Author Topic: Open Source HW RF Signal Generator  (Read 43512 times)

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Offline rhb

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Re: Open Source HW RF Signal Generator
« Reply #100 on: May 07, 2020, 10:06:56 pm »
I have an 8648C and an 8566B.  I've also got a 346B noise source, so I should be able to check the 8566B response.

It will take a few days as I'll have to set things up to do the tests.  And moving the 8566B is *not* easy.  And  I just got a bunch of new TE I need to test.

Have Fun!
Reg
 

Offline rhb

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Re: Open Source HW RF Signal Generator
« Reply #101 on: May 10, 2020, 10:57:50 pm »
Here are photos of the 8648C on the 8560A at 100, 200, 500 and 750 MHz at 0 dBm output.  The higher frequencies will require using the 8566B which is a real chore to get to where I can connect it to the 8648C.  I'll try to do that in the next few days.  Complicated by having only spent a few minutes running the 8566B.  Stuff like that is always an educational experience.

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Have Fun!
Reg

BTW the marker info is irrelevant I forgot to turn it off.
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #102 on: May 27, 2020, 04:46:37 pm »
Did you get around to get the big Analyzer on the bench and get it up and running?

I plan to do a livestream on my (so far mostly gaming related, but I want to expand that) Twitch-Channel www.twitch.tv/saabfan86 on friday (2100 hours central european time / GMT + 2) where I'll explain the design of each functional block and will answer questions from the chat. I hope it works as I intend it to :D

On Sunday I'll do another live stream, which will probably be shorter, where I'll address all the questions I was unable to answer and also discuss any changes or fixes to errors that were discovered during the first live stream.


So far, I think the approach I chose with the filtering and DDS for lower frequencies looks promising when comparing the spectra to the HP 8648C. Especially at frequencies below 400 Mhz. To be honest, I was expecting my system to perform much worse than what I actually observed.
Especially for a device that is supposed to cost less than 300€ in kit-form (Partially assembled Mainboard + Components and Attenuator-Module).

The closest competitor I was able to find in terms of price and features without going to the used market, would probably be the Era Instruments ERASynth Micro. It has a similar frequency range, but cannot go as low as my design, and it's quite a bit smaller. But on the other hand, does not support advanced modulation schemes, arbitrary waveforms and also does not include any filtering of the harmonics in the output.

I hope I can answer all the questions on friday and I'm looking forward to explain my ideas in more detail than possible in a simple forum post :)

Btw. For all those who can't make it on friday, you can send me questions here on the Forum or via Twitch direct Messages. I'll try to answer the questions and the live stream will be recorded and available on twitch for at least one or two weeks.

Offline rhb

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Re: Open Source HW RF Signal Generator
« Reply #103 on: May 27, 2020, 09:52:11 pm »
I spent several days working on a LeCroy DDA-120 before giving up for now so I could check an HP  4145B semiconductor analyzer which I had gotten and needed to test. 

Then I suddenly  got a lot of other stuff on my plate.  A new tenant had a burst water line which flooded an office building and I had to deal with drying that out.    I was fixing fluorescent light fixtures rewiring them for 4' LED lamps today.  And I need to install an HVAC system in my house.

The 8566B is at the bottom of a large stack of gear. and I'm rather space constrained right now because of my  TEA binge.  However, I might be able to roll the stack close enough to the 8648C to hook it up.  I'll see if I can move the dolly close enough.

Reg
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #104 on: May 29, 2020, 08:54:34 pm »
The livestream has happened and I was able to go over all the individual sections in about 1 hour and 30 minutes.

Links to the Videos are here: https://www.twitch.tv/collections/4VVijwCbExbTEA

Please post your questions and suggestions so I can try to answer as many of them on my sunday livestream that will also happen around the same time as today (2100 hours GMT +2).
And if you've got a Twitch-Account, feel free to follow me on Twitch or hang around in the chat on Sunday for a more direct interaction :)

Offline nctnico

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Re: Open Source HW RF Signal Generator
« Reply #105 on: June 09, 2020, 12:06:45 am »
Does anyone here have RF generators by HP, Philips, Tektronix, Rigol, etc. and a Spectrum Analyzer to do similar measurements to compare the spectra of these generators to my prototype-setup?
No but RF generators typically have a 2nd harmonic at up to -20dB compared to the fundamental frequency. If the 2nd harmonic is at -30dB you have an excellent result.

Interesting project BTW. I have been working on something similar but less complex.
« Last Edit: June 09, 2020, 12:09:14 am by nctnico »
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #106 on: June 19, 2020, 08:12:53 pm »
That's good to know.
I will do another livestream next Thursday where I'll check everything one last time before ordering the boards in China.

If you guys have any more questions or ideas send me a PM or join the Twitch-Chat on Thursday :)

Offline ogden

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Re: Open Source HW RF Signal Generator
« Reply #107 on: June 19, 2020, 08:30:45 pm »
No but RF generators typically have a 2nd harmonic at up to -20dB compared to the fundamental frequency. If the 2nd harmonic is at -30dB you have an excellent result.
Could you please name some RF generators with 2nd harmonic at up to -20dB ?
 
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Offline chrisl

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Re: Open Source HW RF Signal Generator
« Reply #108 on: June 23, 2020, 06:54:52 am »
No but RF generators typically have a 2nd harmonic at up to -20dB compared to the fundamental frequency. If the 2nd harmonic is at -30dB you have an excellent result.
Could you please name some RF generators with 2nd harmonic at up to -20dB ?
All my gens have the 2nd harmonics better than 40 dBc.
 

Offline nctnico

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Re: Open Source HW RF Signal Generator
« Reply #109 on: June 23, 2020, 06:13:46 pm »
Lucky you. If you go through some specs you'll see that there are several with far lesser performance where it comes to 2nd order harmonics. Usually there is also some dependancy on the output power (logically). Anyway, this isn't a pissing contest about who has the best RF generator; it is about what would be an acceptable performance level for a DIY RF generator you can build from commonly available parts. Aiming at better than -20dB is a good start.
« Last Edit: June 23, 2020, 06:15:46 pm by nctnico »
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #110 on: June 28, 2020, 01:53:25 am »
I went through the design one more time and I'm pretty sure it's ready for production now.

The partially assembled boards will be about 50 to 70€ each when ordered from JLCPCB (5 PCB order). Depending on what german customs wants and if JLCPCB charges for the high precision manufacturing or not.

With all the parts that need to be bought from mouser or digikey to be hand soldered (most importantly the expensive ADF4356 and AD9957-Chips) the cost for the full mainboard comes to about 260 to 280€ (with a generous safety-margin).

With a display, keyboard and all the connectors, as well as a power supply and some sheet metal for the case, the material-cost for the entire device (assuming cost for the boards with a 5 board order) should be around 350€.

For comparison, the ERASynth Micro is about 100€ cheaper, but only starts at 12,5 MHz and has no filtering of the harmonics. Old RF Generators on ebay with digital control are around 500 to 1200€.

If someone here wants one of the prototype-boards to test and write code for the device, please send me a PM (I'll have 3 available, maybe 4 depending on how bad I mess up the soldering of the large chips ;) ).
I'll post the updated schematics in the GitHub soon and link it here.

I'm going to program the system with the STM32Cube IDE, since I've become pretty familiar with it by now and it offers much more direct access to the hardware than the STM32 Arduino-Libraries. Especially the DMA-Functions and the possibility to use Free RTOS are interesting.
I am struggling a bit with the Virtual COM-Port though. So if anyone can give me some hints on how to make the chip read and write data via the COM-Port from/to the PC, that would be helpful.
I've got a development-board for the STM32F407 here btw. So I can already play around a bit with some basic functions like communicating with a PC.

Offline awallin

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Re: Open Source HW RF Signal Generator
« Reply #111 on: June 28, 2020, 07:07:54 am »
Can you add an open-harware license for the schematics and PCBs? and a software license for the firmware?

I went through the design one more time and I'm pretty sure it's ready for production now.
can you summarize the specs you are aiming for? it's hard to sift through the 5+ page thread and guess at where the specs are now..
(number of output channels?, frequency/level range/resolution?, external 10MHz ref? Ethernet/USB interface? etc.)

Quote
I'll post the updated schematics in the GitHub soon and link it here.
what happened to release early & often?  :P 2-year-old JPEGs of schematics only now...

Quote
I'm going to program the system with the STM32Cube IDE, since I've become pretty familiar with it by now and it offers much more direct access to the hardware than the STM32 Arduino-Libraries. Especially the DMA-Functions and the possibility to use Free RTOS are interesting.

is that IDE available for free?
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #112 on: June 28, 2020, 11:46:32 am »
For a quicker Overview, I'll edit the first post and add the Specifications for the current prototype.

The reason why I've not updated the GitHub as frequently as I wanted is mostly caused by the fact that this project is a personal hobby project which therefore had the lowest priority in the list of projects I'm working on.
Also I originally had planned to use modules and when that turned out to be a nightmare due to the communication-issues on the SPI Bus, I got frustrated enough that I lost interest for some time.
I think I have posted some schematics that are more recent than 2 years though ;)

The Cube IDE from STM is free. It's a customized Eclipse Distribution with code generating features for basically all micros made by STM.

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #113 on: July 01, 2020, 10:23:52 pm »
I realized I had a few more pins available on the FPGA and decided to isolate the ADF4355 and AD9957 completely from the CPU by routing all the control-signals through the FPGA.

I also compared the footprints of the AD9910 and AD9957 by overlaying the pictures of the pinout in Photoshop and I realized that, except for Pin 51 ("RT" on the AD9957 and DGND on the AD9910), they're "footprint compatible". Meaning by configuring the FPGA in a different way, it's possible to use most of the features of the AD9910 when soldered on this board - The RAM-Sweep inputs and outputs won't be connected, so the RAM-Sweep-Function isn't available when using the AD9910.

Another thing I did was to dedicate separate SPI clock and Data-Lines for the ADF4355 instead of having both the AD9957 and the ADF4355 on the same bus, to make sure no noise from the bus is coupled into the RF-Output like it's happening with my module-based prototype right now.

Also I decided to use resistor-arrays of 4 resistors for the SDRAM instead of 8-Resistor Arrays, since JLCPCB has the 4-Resistor-Arrays available in their assembly-plant. Also they're easier to solder :)

And I added an Interrupt-Request Line from the FPGA to the CPU. Always handy to have the FPGA tell the CPU that it want's something :D

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #114 on: July 11, 2020, 01:45:18 am »
And another update here just 2 days before I plan to order:
- Added 120 Ohm Series Terminators to every device on i2c-Bus

- Changed the Regulators for the Low Frequency Amps from 78L05 to 7805 and added Heatsinks (didn't realize that the AD8009 draw over 200 mA each at full output-power plus 25 mA quiescent current)

- Checked Power-Rails again for current requirements - I haven't found any more red flags, but airflow from a fan will be required for the local supplies of the RF-Section, since there's a lot of power being dissipated there (the 78L05 for the Attenuator-Supply will probably reach 90°C and the big TO-220 package 7805 will dissipate over 4 Watts under worst case conditions)

- Changed the Inductors of the Bias Tees for the RF-Amplifiers to Coilcraft 4310LC-352KEC. This way I don't need several inductors to have the amps work at from a few kHz up to 6 GHz

- Added cutouts in the soldermask over the RF-Traces whereever possible to remove the negative effects on impedance introduced by solder mask

- Added connector for a PWM-Controlled Fan powered by the +12V-Rail, which also feeds an RPM-Signal back to the CPU

- Added Dedicated +5V Supply to the Attenuator-Connector (5V provided by 7805 in TO-220 package and supplied by 12V-Rail) to make powering mechanical attenuators with higher current demands possible (heatsink might be necessary if the attenuator draws a lot of current)

- Reshaped the soldermask-cutouts for the ADF4355-Section to make room for the 4310LC-352KEC Coils

- Added Soldermask-Cutouts to improve isolation between the individual RF-Sections

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #115 on: July 20, 2020, 11:20:30 pm »
That software looks interesting for early evaluation, but I have decided to buy the ADF4355 instead of the 5355. And one would need to reverse-engineer the protocol unfortunately.

I have ordered the boards now btw. JLCPCB finished them yesterday and they're now on their way to Germany.
So if anyone is interested in partially assembled boards without any Software on it, I have 3 available :)
Send me a PM and we can discuss details.


Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #116 on: July 31, 2020, 10:39:05 am »
After some screwups on DHL's part, the boards are finally here!

Production and communication with JLCPCB went smooth as always. There was an issue with trace to hole spacing in the footprint of U8_RF, which they rectified by moving the traces around after my approval and I apparently had selected the wrong resistor-footprint for a part that they just omitted after I approved them to do so.

Over the weekend and the next week, I'll start assembling one board step by step to verify each module. I'll probably will also livestream a good portion of that on my Twitch-Channel.
First will be the switching power supply on the left side of the board, followed by the CPU.
In retrospect, I probably should have paid a few euros more to have all the 22 Ohm series terminators on the datalines populated by JLCPCB, since there are quite a few of those on the board. They are easy to solder, but soldering so many takes time and I'm sometimes lazy  ;D

From a quick look at the board, I also realized I should have taken a look at the bottom side before ordering, since I screwed up the position of one capacitor I moved to the bottom side in my last revision. Unfortunately, I put it right where a cutout in the solder mask is  |O
I think I can just solder the cap in there by using as little solder as possible and being extra careful, but it still is an annoying mistake that could have been avoided.

I hope I'll see some of you in the chat of my stream and until then I'll leave you with a picture of this rather pretty board - If I screwed it up beyond salvage, it'll still make a good wall decoration  :D
« Last Edit: July 31, 2020, 10:45:27 am by SaabFAN »
 
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Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #117 on: August 01, 2020, 02:19:24 pm »
I have assembled the power supplies, clock generator and the Serial Interface (the boring stuff basically) and so far no smoke :D

All voltages are exactly what they're supposed to be and on monday I'll install the FPGA when I'm at work.

Up to now I have identified the following problems:
- U4_CLK (74LVC74): Footprint a little bit too wide for the chip I ordered. Pin-Pitch is right, so I was able to install it anyway.
- U5_CLK: Ordered the part with the wrong footprint (Ordered PL500-17SC with SOIC-8 Package instead of PL500-17TC in SOT-23 Package). I'll have to install the chip deadbug-style since the PL500-17TC seems to be sold out everywhere.
- U5_LFS, U6_LFS, U7_LFS (Analog supplies for the REFCLK-Parts inside the AD9957): I forgot to order the 1.8V RT9193 Regulators. Don't know why, probably missed them on the list when I ordered. They're not available from Mouser, so I'll have to order from LCSC or Digikey. Until they arrive, I'll just connect the 1.8V from the switch mode converter to the output-pads of these chips. It'll introduce noise to the internal Clock of the AD9957, but at least I'll be able to talk to the chip and see if it does anything at all :)
- C31_HFS: Sits across the cutout for the shield of the ADF4355 Loop-Filter
- ADF4355 Loop-Filter:
   - Silkscreen hard to read (Needs to be rearranged)
   - Power-Traces are inside the shield-area (need to be moved outside or to the 3rd (Power) Layer)
- Tantal Capacitors: Indicator for positive side hard to see in densely populated areas
- Power Idication-LEDs: Only one color and the large Vias are placed BETWEEN Resistor and LED, so no easy to access test-points to measure voltages from PSU-Section :palm:

Not so much a problem, but some things I realized during soldering:
- Assembly: It can get kinda hard to head up GND-Pads and especially through hole contacts. Thermal relief-connects, at least to the large ground plane, might be a good idea.
- RF Power-Supply: It looks a bit too chaotic for my taste.

Offline rf-messkopf

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Re: Open Source HW RF Signal Generator
« Reply #118 on: August 13, 2020, 12:25:32 am »
This is a very interesting project that I only stumbled upon today. Thank you very much for sharing. Just a couple of remarks from what I gathered so far:

From the block diagram I reckon that you are using the main synthesizer IC, the ADF4355, in fractional-N mode. This is perfectly fine, but the price to pay is that you get integer boundary spurs with fractional PLL divide ratios. These spurs can be very near the the carrier when the fractional divide ratio is close to an integer. Then they add to the close-in phase noise, which is often a critical requirement for signal generators. Since you already have a DDS synthesizer on the board, it might be worth considering to operate the ADF4355 only in integer-N mode, and feeding the DDS output to the reference input of the ADF4355 above 400 MHz output frequency in order to obtain the required frequency resolution. This modification should only require some additional RF switches and the requisite control lines, as well as some software modifications.

If I'm not mistaken you are using a 10 MHz signal as a reference for the ADF4355, which is divided down from a 20 MHz clock source. This is the minimum input frequency specification for the ADF4355. However, in order to optimize phase noise especially at high VCO frequencies, it is desirable not only to have a reference signal with low phase noise, but also to keep the PLL divide ratios as small as possible, which means that the frequency at the phase-frequency detector should be as high as possible. This is reason that the ADF4355 allows a maximum input frequency of 600 MHz (differential). One way to achieve a good phase noise performance might be the following:
1. Use a low phase noise VCXO with a frequency as high as possible.
2. Phase-lock this VCXO to your reference frequency (e.g. 10 MHz), and ensure that the reference PLL has a very small loop bandwidth (some ten Hertz) in order not to deteriorate the good phase noise performance of the VCXO outside the bandwidth.
3. Feed the VCXO output directly to the phase-frequency detector of your main PLL (bypass internal dividers and doublers in the ADF4355).
4. As mentioned above, you can also use a DDS synthesizer between the low phase noise VCXO and the phase-frequency detector of the main PLL.

I have tried a similar project, although that was much less ambitious (a signal generator based on the ADF4351, starting at 35 MHz output frequency, with switched harmonic filters and output leveling with a voltage controlled attenuator). See here for schematics and some test results: https://www.mariohellmich.de/projects/sig-gen/sig-gen.html.

Unfortunately my design suffers from an elevated spur level at higher output frequencies due to a stability issue with an amplifier at the output of the ADF4351, and for simplicity I have not provided a lot of gain reserves to achieve output levels beyond +10 dBm at higher frequencies. Currently I'm trying to convince myself to tackle a revision II of that design.  :)
« Last Edit: August 13, 2020, 01:38:57 am by rf-messkopf »
 
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Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #119 on: August 13, 2020, 11:18:08 pm »
Yes, the Master Clock-Block could probably be better. There's certainly room for a more complicated setup on the board in that region :D

The master clock is a 20 MHz-Clock from a PL500-17 oscillator that is distributed by a PL133 Chip to the ADF4355, AD9957 and the FPGA as a differential clock-signal. I used ATB2012-75011-T000 Baluns to turn the signal from single ended into parallel, which works pretty well, despite the Baluns not actually being used according to their specification :)

Originally, I was thinking about using a SI5340 as the main clock generator, but decided against it due to the complexity and the fact that it's a QFP-Package.
In hindsight, it might have been better to use it though, I think.

At the moment, I'm trying to figure out how to implement the SDRAM-Controller in the FPGA and how the state machine will need to work to send data to the AD9957.
For a start, I'll just use the FPGA as a distributer for the SPI-Bus to have the CPU talk to the Signal-Sources.

Offline rf-messkopf

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Re: Open Source HW RF Signal Generator
« Reply #120 on: August 15, 2020, 11:33:10 pm »
Yes, the Master Clock-Block could probably be better. There's certainly room for a more complicated setup on the board in that region :D

It does not have to be more complicated if you use a high-performance integrated VCXO. They are available, for example, by Crystek, with frequencies up to a couple of 100 MHz. Maybe your total BOM cost will rise by five or ten Euros, and they are available from the major catalog distributors. You can get even better ones with higher frequencies from Axtal or Kristallverarbeitung Neckarbischofsheim, see, e.g., https://www.axtal.com/cms/docs/doc85902.pdf, although they may be overkill here.

Originally, I was thinking about using a SI5340 as the main clock generator, but decided against it due to the complexity and the fact that it's a QFP-Package.
In hindsight, it might have been better to use it though, I think.

The Si5340/Si5341 are certainly good clock oscillators with low phase noise, I have used the Si5341 as LO for a shortwave receiver. But a good VCXO will be better by orders of magnitude. For example, the Crystek VCXOs have a flicker floor of close to -170dBc/Hz.

Unless you absolutely have to shave costs on that design I would go with a VCXO. BTW: Are you aware of the ADIsimPLL software by Analog Devices? It can simulate your PLL circuit and has built-in models for all the PLL ICs by Analog. It can also synthesize loop filters, so that you do not have to solve complicated systems of equations by hand to determine component values, and it can compute the output phase noise power spectral density for a given phase noise of the reference. This can help you to avoid over-engineering your reference given the performance of the ADF4355.

At the moment, I'm trying to figure out how to implement the SDRAM-Controller in the FPGA and how the state machine will need to work to send data to the AD9957.
For a start, I'll just use the FPGA as a distributer for the SPI-Bus to have the CPU talk to the Signal-Sources.

Keep us updated about your project.  :)
 
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Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #121 on: August 30, 2020, 11:58:23 pm »
The Work continues.

Last Weekend I did some soldering during my livestream, where I tried to figure out why the amplifier for the reference Input didn't work until I realized that I had put a 50 Ohm Terminator next to the PLL-Chip.
Obviously, this screwed up the current flow that was going through the resistor rather than the BFR93 transistor, screwing up the bias-point and everything else.
I ended up just removing the terminator since the signal looked clean enough.
I will have to address the PLL at some time in the future, but since it was pointed out that the master clock could have been implemented better, I've put optimizing this particular PLL on the waitlist for now.

Next I checked the clock-signals to the Chips again to make sure I didn't screw up anything there and found a few things:
- ADF4355 Clock had no DC Return-Path from the PL133 and through the BALUN, so I had to solder a 100 Ohm resistor across the two DC Block-Capacitors that isolate the local termination from the BALUN to make the signal look a lot better. Also the 3.3V Termination isn't really necessary at the 20 MHz I'm feeding into the chip. It would have probably been enough to just use the 50 Ohm resistors to ground to attenuate the signal enough to make it fall in the specified area of the ADF4356 Datasheet.
- AD9957 Clock-Input needs DC Block Capacitors (Oops) - Had to cut the clock-traces and solder in the caps. Not the clock-signal looks good. Also needed 1k Ohm additional series resistance to be within spec (2000mVpp)

After that, I turned my attention to the ADF4356 to get it running. For that I took an example for the ADF5355 and adapted it to the ADF4356 today. The library holds a mirror of the ADFs registers, which allows for easier debugging and all the values in the registers are easy to read and understand the way I organized them. Not very memory-efficient, but for debugging purposes it does the job very well.
Which brings me to the next topic: Debugging this bitch.
First of all: Communication is working! I verified that I can change configuration-values in different registers and the signal arriving at the chip looks really good on the scope. I also had no lockups of the chip that required a complete reset due to spikes on the data-lines like the old system.
BUT: The chip isn't working correctly! I did manage to get one or two frequencies to be more or less what I told the chip I wanted them to be, but most of the time the output is something entirely different from what I told the chip. When I look at the N-Counter output of the chip, which should match the R Counter-Output to be locked to the reference, the signal is also all over the place. Frequency is usually quite a bit lower than the PFD-Frequency and sometimes, at higher frequencies, the pulses even appear irregularly.
From my experiments over the last few hours, the most likely culprit is the automatic VCO Band-Selection and autocalibration inside the chip. I also found several Community-Posts over at Analog Devices, but all the threads were either abandoned, or ended in "I'll tell you how to fix via Email".

So far I have played around with basically all the settings but haven't managed to figure out how to get it to work. Changing the charge pump current changed behavior a bit, but didn't cause the chip to lock. Bleed current didn't do much either. Changing the Polarity of the Phase Frequency Detector only made things worse and enabling or disabling the Doubler or Divider of the Reference-Input didn't do jack either. 

Anyone got any idea what's wrong or has some experience with this chip?

Btw. the values for the loop filter I have gotten from the ADIPLLSIM-Software are (rounded up to what I have in my parts bin):
C1: 47pF / R1: 4.7kOhm, C2: 440pF / R2: 12.1kOhm / C3: 6.5pF
According to the Software this gives a Loop Bandwidth between 42.5kHz (Phase Margin 9.25degrees) at 300uA Charge Pump-Current and 200kHz (Phase Margin 38.6 degrees) at 4.8mA Charge Pump-Current. Which, according to the software, should result in a lock-time of 2.92ms.
As far as I have checked my code, the values for the PLL Registers should be correct (Integer, Frac1, Frac2 match the values my pocket calculator gives me) and are being transmitted in the right order and as I said the chip is reacting correctly to setting bits like the configuration-bits for the MUXOUT.

In case you want to look at the code, I have updated the Github a few minutes ago.

Btw. I originally developed the driver for the ADF4355 and only realized later, during the debugging, that I have a ADF4356 on my board. Changing the Software (I don't use Register 13 right now, which the datasheet says you can do) didn't really change things however.

Offline OwO

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Re: Open Source HW RF Signal Generator
« Reply #122 on: August 31, 2020, 04:00:52 am »
Check Vtune? If it did not select the right band Vtune should be pegged low or high. If Vtune is random you probably have a loop stability problem.
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Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #123 on: August 31, 2020, 03:04:00 pm »
Yes. Vtune is at 4.6V or at 0.2V. Depending on frequency.

I have downloaded the software for the evaluation-board and I'm going to compare the register values the chip is supposed to get (according to the Analog Devices Software) and what it is actually getting.

Offline rf-messkopf

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Re: Open Source HW RF Signal Generator
« Reply #124 on: August 31, 2020, 03:55:11 pm »
BUT: The chip isn't working correctly! I did manage to get one or two frequencies to be more or less what I told the chip I wanted them to be, but most of the time the output is something entirely different from what I told the chip. When I look at the N-Counter output of the chip, which should match the R Counter-Output to be locked to the reference, the signal is also all over the place. Frequency is usually quite a bit lower than the PFD-Frequency and sometimes, at higher frequencies, the pulses even appear irregularly.

From my experiments over the last few hours, the most likely culprit is the automatic VCO Band-Selection and autocalibration inside the chip. I also found several Community-Posts over at Analog Devices, but all the threads were either abandoned, or ended in "I'll tell you how to fix via Email".

The N counter and R counter outputs will only be the same when the PLL is locked. I have no experience with the ADF4356 myself, but on many other PLL synthesizer chips from AD you can route the reference input of the PFD or the R counter output to the MUX-OUT output. This allows you to verify that your reference is processed properly.

Check page 26 of the datasheet, there is a restriction on the VCO band selection clock, which has a dedicated divider, which must be set up correctly. The corresponding register must be set as follows: VCO Band Division = Ceiling(f_PFD/1,600,000), or f_PFD/(VCO Band Division × 16) < 100 kHz. See also the example on page 31 of the datasheet. There is another divider for the ADC clock, which must also be set according to the PFD frequency. Moreover, there is a VCO band hold bit, which should be cleared.

Consider hardware problems (solder bridges, broken connections, etc.). If all else fails: Don't overlook the possibility that your chip can be toast. The other day I couldn't get a AFD4002 to lock. Replacing it solved the problem.
 


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