Author Topic: Open Source HW RF Signal Generator  (Read 37018 times)

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Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #125 on: August 31, 2020, 04:44:48 pm »
My library contains code that generates the correct dividers for the internal ADC-Clock and also the correct timeouts. Changing these values didn't yield any result though.

I did find out that my code did create the wrong register settings for register 6 and also for register 3 from time to time (depending on the inputs), so I just plugged in the values from the Analog Devices tool for the Evaluation Board.

Unfortunately, the result was the same: Chip didn't generate the right frequencies.

I then started playing around with the settings and updated the register values by hand each time.
When I set the device to a VCO Frequency of 5 GHz and the Output-Divider to 2 and have the processor continuously update the frequency, I noticed that the output jumped around between 1.66 and 1.86 GHz from time to time.
Slowing down the Serial Bus didn't do anything in this regard btw and I can still reliably control the MuxOut-Pin (Checked the R-Counter and the N-Counter-Outputs).

I then started measuring the voltages at the Supply-Pins to make sure everything is okay there.
All the pins that are supposed to be at 3.3V are very close to 3.3V. Vvco and Vvco-reg are at 4.95V.
The other supply-voltages are being created inside the chip and need to be decoupled, where I started to notice something:
- CREG1 is sitting very close to 0V, while CREG2 is at 1.8V. According to the datasheet, both pins are connected to the internal 1.8V Regulator and need to be decoupled with 100nF capacitors.
- Vbias is sitting around 3V and Vref at 4.2V. <- Not quite sure if that's correct.
- Also the chip is getting really hot as soon as it's programmed and sending out a signal. Not quite sure if almost too hot to touch is too much. I can get the power consumption down by setting the power down-bit though.

So yea, busted chip is definitely a possibility  >:(
Btw. reflowing the chip didn't help and the solder looked like it was creating a connection between the pads and the chip when I moved the chip around a bit, so I dont think that the soldering is the problem here.

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #126 on: August 31, 2020, 11:22:57 pm »
Update:
Browsing through the Engineer Zone on Analog Device's Website, I found this:

Quote
Hello,

1. That is the correct behavior. When there is no reference signal, the synthesizer cannot work but the VCO can still generate a frequency which will be driven directly from the output pins.
2. Creg1 pin is floating, so 0V is fine. Datasheet has a typo and will be corrected.


Regards,
Kazim


and also:

Quote
All,

I figured out my issue and wanted to share.  In checking all the hardware components, I noticed that for CREG1 and CREG2 I had values to 1000pF, not the recommend 100nF (0.1uF) values.  This was a mistake in my schematic.  The thing is, the ADF4355 worked with this low cap value while the ADF4356 did not.  After following the eval board and putting a 1uF on CREG2 and 0.1 uF on CREG1, the ADF4356 works as expected.
https://ez.analog.com/rf/f/q-a/117737/migrate-from-adf4355-to-adf4356

I am not entirely sure, but I might have connected a 100nF capacitor to the CREG2 pin. I'll check that tomorrow.

I think it also might be a good idea to pull down the Chip Enable Signal for a second or so before initialization to make sure the chip is properly reset and the registers do not contain some data that is left over from the power up and somehow found its way inside the chip.
Hopefully this will help get this chip finally going.

There's also a way to configure the VCO Bandselect system inside the chip (Application Note AN-1353). I think it unlikely, but not impossible that my attempts at programming the ADF4356 with the values for a 4355, plus maybe one or two completely screwed up register-writes, could have corrupted the internal lookup-tables for the Autoselect. Might be a good idea to read out the chip and see what the internal tables tell me. Fortunately the MUXOUT-Signal (which turns into MISO when writing the reserved value of 0b111 to the MUXOUT-Select Bits in Register 4) is sent through the FPGA, so no acrobatics with jumper wires and soldering iron required to get it to the MISO-Pin of the CPU :)

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #127 on: September 01, 2020, 03:46:35 pm »
Well, it appears to be working now.
What I did was:
- Changed the capacitor at the CREG2 Node to be sure it's 1uF - Didn't work. The Chip was still selecting the wrong VCO-Band.
- Changed the MUXOUT to Dvdd - Suddenly the Chip selected the right VCO-Band and worked.
- Changed the MUXOUT to Digital Lock Detect - Lock-Signal shows PLL is locked.

Spectrum Analyzer and Counter agree: Output is exactly what I set the chip to put out (within the measurement uncertainty of my equipment).

So the problem was probably a combination of the capacitor and the settings for the MUXOUT, or just the MUXOUT-Settings alone.

Now I have to make sure my Software is generating the right register values reliably.
I will have to test the software and make sure the chip is working properly over its entire frequency-range, of course. But at least this damn roadblock is out of the way now without having to implement workarounds to manually select the VCO-Band.

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #128 on: September 29, 2020, 11:25:55 pm »
Last weekend I started the development of the AD9957 Driver.

I think I can test the first basic version tomorrow (I still don't have the 1.8V Regulators and have to power the PLL and VCO-Circuits of the Chip with the not so clean 1.8V from the switch mode converter for the digital circuits - We'll see how well that goes :D ). Github-Repository is updated.

I also decided to switch from C to C++ for the project to have structures like Classes available and also to make the Driver for the AD9957 easier to port over to other IDEs like the Arduino.

Things to do right now (Next 2 Weeks):
- Test the Drivers
- Come up with a memory-map for the SDRAM attached to the FPGA
- Implement some kind of SDRAM-Controller in the FPGA
- Test the SDRAM and determine the maximum speed before read / write-errors occur <- The minimum speed I'm aiming for is 125 MHz SDRAM-Clock.

Things to do after that:
- Implement Controllers inside the FPGA to hand off programming the AD9957 and ADF4356 to the FPGA (anything from simple playback of values from RAM by a state-machine to something more fancy)
- Come up with a User Interface and mount the board inside a case.

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #129 on: October 25, 2020, 03:21:31 pm »
After quite a bit of frustration (partially because I've been down with a cold for 2 weeks - No Covid-19 though), I've managed to get the AD9957 to semi-work.

At first I had a few difficulties communicating with the chip, but after some fiddling I've got rock-solid communication between the CPU and the Chip (Both Write and Read). The debugging-functions in the STM32IDE really help in that regard. No need to write countless lines of Serial.println()-Statements to debug the code. Just set a breakpoint and done! :)

Unfortunately, I can't seem to get a decent signal out of the chip, which (again) has some features that aren't documented in the Datasheet - The PDF-Doubler that can be enabled by the "open"-marked Bit 0 in CFR 3 for Example.

I have verified Communication and working PLL of the Chip by enabling the SyncClk-Output (PIN55 - Output of SysClk / 4), as well as the PDCLK-Output and the REFCLK-Output:
REFCLK-Output puts out (after I removed the BALUN and replaced it with 2 capacitors) a 51% DutyCycle 20 MHz Square-Wave.
PDCLK puts out a Square-Wave at 125 MHz directly after programming the three CFR-Registers and changes to a different value depending on the Frequency set in the Profile-Register. Most of the Time it's 62,5 MHz.
SyncCLK is a 50% Dutycycle Square-Wave at 250 MHz.

So far so good.

The Output at the IOUT-Pins is a different matter though: When I program any Profile other than Profile 5 in Single Tone-Mode, I get noise with a spectrum from DC to about the StopBand of the Lowpass-Filter.
When I program Profile 5 with the exact same Values, I get a Sine-Wave with the correct frequency but with an amplitude modulation of about 0.9 Hz, as well as huge spikes at 150 and 300 MHz on the Spectrum Analyzer. On the scope it looks like another signal is superimposed on the sinewave.

I've checked all the voltage-rails and they are right where they are supposed to be. Both in terms of voltage and ripple (Ripple is less than the noise-floor of both my Scopes).

Just to check if I had done anything wrong when calculating the register-values, I generated the values with the Software for the Evaluation-Board and dropped them into my software. The result was the same.
What puzzles me is the fact that only Profile 5 seems to be working for Single Tone-Mode (sine-wave with other signals on top of it), despite the Datasheet stating that the chip contains 8 profile-registers that I can read without issues and which are selected by the 3 Profile-Pins (all of them are at 0V and held there by the FPGA, so Profile 0 should be selected).

Anyone got any ideas might be wrong? Or how to check if maybe the Profile-Pins got damaged?
One interesting observation btw.: When I programmed the chip with the values for a 250 MHz Sinewave, the SyncCLK disappeared, but the IOUT-Pins still had the 250 MHz Sine-Wave on them (plus the strange superimposed signal).

Edit:
I changed the RefCLK-Circuit a bit to make the way to GND from the !REFCLKIN-Pin shorter, but it didn't work.
Disabling REFCLK-OUT didn't help either.

Offline radar_macgyver

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Re: Open Source HW RF Signal Generator
« Reply #130 on: October 25, 2020, 07:34:03 pm »
Are you using the auto I/O update or pulsing the IO update pin after profile changes?

I dug up an old schematic in which I used an AD9957, and noted that I have a zero-ohm resistor between I/O_RESET and CS. This forces the I/O state machine to reset after every SPI transaction. I also recall having some difficulty with SPI before I set the SDIO 'bidi' bit properly (I used 4-wire SPI). The readback of profile registers (but not writing them) depends on the state of the PROFILE[0..2] inputs.

You may also want to check the various power supplies for the device to make sure they are OK *after programming*. The supply current, especially for DVDD, changes dramatically after enabling various blocks on the chip.

When the operating mode is set for QDUC or interpolating DAC mode, the CCI filters are enabled. They do require a CCI reset, since their internal accumulators initialize with random junk. The symptom of this is random noise at the DAC outputs, as you observe for some of the profiles. You can also sample the CCI_OVFL pin. Maybe CFR1[25:24] are not set to 01?
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #131 on: October 25, 2020, 11:13:50 pm »
I am pulsing the IO Update-Pin manually after transmitting the contents of one register. I'll try enabling auto IO-Update. I haven't tried changing the profiles yet, since that would require the FPGA to communicate with the CPU as well and so far I have only implemented some very basic logic in the FPGA.

I can read the registers, however and the content is always correct: It's always the same values that I wrote to the registers.

Once the Chip is programmed and doing its thing, the supply-voltages are very stable and have very little ripple on them. I have decided to use linear regulators for all the supply-rails except the DVDD-Supply. For DVDD I'm using a switchmode-converter (Regulator-Chip: TLV62569DBVR).
I've checked the ripple of the switchmode converters output and I didn't notice anything particularly strong on it. Just to be safe, I added 2x 47uF Tantalum capacitors to the 1.8V DVDD-Rail, but that didn't have any effect on the problem I have. The other voltages are very clean - I basically see no difference in the noise on my scopes when the probe touches anything on those rails.
For the linear regulators I use Richtek RT9193-18GB and Richtek RT9193-33GB with 10uF output capacitance and an additional Ferrite bead together with 10, 1 and 0.1 uF Caps as close to the pins as possible to filter any noise on the supply-pins for the analog components (like the DAC).
I noticed, however, that I have used 1uF capacitors for the DVDD-Rail instead of 0.1uF like the Evaluation-Board did. The caps are 0603 package capacitors. So I'll add a few 0.1uF caps to see if that might help.

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #132 on: October 26, 2020, 01:43:21 am »
I have added the 0.1 uF caps and played a bit with the settings:
  • Adding 0.1uF ceramic Capacitors to the DVDD-1.8V Rail: No Effect, ripple on the DVDD-Rail about 40 mVpp
  • Activating IO Auto-Update: Erratic Behavior and registers not receiving / reporting back the correct values. No Outputs at IOUT-Pins
  • Changing SysCLK to a lower frequency (down to 500 MHz): No Effect
  • Added 22uF ceramic capacitors the the DVDD-3.3V Rail and the DVDD-1.8V Rail: No Effect and still about 40 to 60mVpp Ripple on the rails. Ripple goes up to 100mVpp if the current draw is low

I then checked all the control signals again and found something interesting:
Many control-signals have quite a bit of noise on them with Spectra very similar to that of SyncCLK-Out. Disabling SyncCLK-OUT doesn't change this.
I have 22 Ohm Series Terminators on all traces that connect the FPGA to the AD9957. On the scope I was able to see spikes with peak-values of up to 300mV. Given the Spectra and the limited Bandwidth of my Rigol Scope (100 MHz Max for both probes and Scope), I think the actual voltage might be quite a bit higher.
DC-Level is very close to 0V btw.
What I'm wondering now: How can INPUT-Lines have that amount of noise on them? Am I measuring wrong? Chip defective? Bad solder joint? The pad underneath the Chip comes to mind - Maybe the Solder didn't make good contact there.
I also noticed a 38kHz amplitude modulation on the SyncCLK-Out that gets more pronounced as soon as one of the Profiles is being programmed. I haven't found the source for this amplitude modulation, but nothing on the board is operating at that frequency and I don't see anything on the supply-rails that would explain this modulation. The most likely candidate (The Buck-Converter for DVDD-1.8V is operating at much higher frequencies and its bursts are happening at much higher frequencies and are not synchronous with the modulation of SyncCLK.

Offline radar_macgyver

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Re: Open Source HW RF Signal Generator
« Reply #133 on: October 26, 2020, 04:39:38 am »
Hmm, it could be the EPAD is not properly soldered. There are several GND pins but the high operating frequency means their parasitic inductance can cause trouble. Also, the use of a switcher for the DVDD supply is unfortunate - the switching spikes can be difficult to get rid of, especially without a cleanup LDO. However, this will likely just cause a modulation sideband on your output, not the kind of issues you're seeing.

Maybe consider reflowing the part? Or replacing the chip? Without a schematic I can only guess.
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #134 on: October 26, 2020, 08:09:22 am »
I'll try reflowing the chip later today.

Regarding the switchmode power supply: Since it is only powering the internal DSP of the chip and is not connected to the DAC in a direct manner, I thought there would be a high enough isolation between the Output and the DVDD-1.8V components to make use of a switcher a good idea (the chip draws quite a lot of current on that rail - especially in QDUC-Mode).

Schematics are in the Github, but I just realized that I uploaded the wrong one for the part of the device that covers the AD9957 - I'll rectify that later. :)

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #135 on: October 28, 2020, 12:48:40 am »
Today I reflowed the chip during a livestream - It didn't go according to plan... I made a mess with the solder when I installed the Chip again and had a lot of solder bridges on the chip. After finally getting rid of them, I realized there was a short on the supply-rails. Where I couldn't tell. Removed the chip again, as well as several capacitors and short was still there. So in the end I isolated the affected supply-rails (desoldered regulators) and zapped the shorted rails with 15 Amps. That cleared the short (without any smoke btw.) and I installed the chip again, as well as the all the caps.

When I tried to communicate with the chip, however, I couldn't read the registers anymore. So all the heat I applied to the chip must have killed it in the end.

But now to the not so bad news: The solder on the center pad had not melted when I desoldered the chip the first time. It looked like it had been squished a bit, but the metal on the bottom of the chip was completely dry. So there was probably not a good connection between the pad and the board, if there was any.

I have now ordered replacement-chips on ebay, but they'll take at least a month to get here. So until then, I'll have to continue without the AD9957.

I'm still not entirely sure where that short circuit came from btw. Can vias create short circuits to inner planes if heat is applied to the board for too long? As I said, I zapped the traces with 3.3V 15 Amps from my bench-supply (one lead to Ground, the other to the supply-rail. I didn't see sparks or noticed any smoke.

Offline uski

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Re: Open Source HW RF Signal Generator
« Reply #136 on: November 01, 2020, 08:45:42 pm »
I'm still not entirely sure where that short circuit came from btw. Can vias create short circuits to inner planes if heat is applied to the board for too long? As I said, I zapped the traces with 3.3V 15 Amps from my bench-supply (one lead to Ground, the other to the supply-rail. I didn't see sparks or noticed any smoke.

For next time, if you have a thermal camera, you can put a low current into the short (just a few mA is enough, depending on the model/sensitivity of your camera) and probably see it with the thermal camera.

Interesting project BTW. I found this while searching information around the ERASynth Micro which I find is not good enough. Hopefully you will finish your project and make it available :)
 

Offline SaabFAN

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Re: Open Source HW RF Signal Generator
« Reply #137 on: November 24, 2020, 05:06:49 pm »
The new Chips have arrived and I still see the exact same behavior.

So I decided to rebuild the part of the board with the AD9957-Chip on a small daughter-board that I can just mount into the existing mounting holes on the main board.
Connection will be done with thin wires that will be shorter than 2 cm. So signal integrity on the parallel interface shouldn't be too much of a problem. If it is, I can still reduce the speed of the parallel bus.

What I have changed for the daughter-board:
- More Capacitors - 100nF for each pin and 1uF every 2 pins, plus 10uF for the entire rail.
- Linear Regulators for every rail, including the 1.8V Supply for the digital Core
- 2.5mm hole underneath the chip to be able to inspect and if necessary reflow the solder of the exposed pad
- Fixed the Reference-Clock Input (Single Ended input terminated into 50 Ohms and the complementary input capacitively connected to ground)

With a little luck, JLCPCB will also have the AD9957 in stock by the time I order this daughter-board, so I won't have to solder everything myself :)

Apart from getting this daughter-board, I have thought about removing the series terminators on the signal traces from the FPGA to the AD9957. Last time I measured there I was able to see some ripples, but I wasn't sure if they were caused by a measurement error or if they were actually there.


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