So, I did what I thought of before - assembled it for 6809 and lo, it worked. I had to adjust the source to keep the assembler used happy, but the instructions are unchanged. At least, unchanged by me, the assembler did its usual thing of converting the DEX instruction (which 6809 does not have) into LEAX -1,X .
As I'm sure you are aware, they went to some trouble to make the 6809 source code compatible with the 6800, but the binary encodings are completely different.
As another example, the LDAA 0,X was implemented as LDA ,X with no offset at all. The 6809 can do 0, 5, 8 or 16 bit offsets from X, Y, S, or U. The 6800 can only do 8 bit offsets from X.
6809 opcodes are different, but I wouldn't call them completely different. Here is the same code assembled for 6800:
1 0000 20 0C BRA CONVERT
2
3 0002 00 TEMP5 FCB 0
4
5 0003 00 BINV0 FCB 0 ; BIG ENDIAN
6 0004 00 BINV1 FCB 0
7 0005 00 BINV2 FCB 0
8
9 0006 00 READ0 FCB 0 ; CHECKSUM BYTE
10 0007 01 FCB 1 ; LITTLE ENDIAN VALUE
11 0008 02 FCB 2 ; 7,654,321
12 0009 03 FCB 3
13 000A 04 FCB 4
14 000B 05 FCB 5
15 000C 06 FCB 6
16 000D 07 READ7 FCB 7 ; FIRST DIGIT
17
18 000E 7F 00 03 CONVERT CLR BINV0 ; RESULT = 0
19 0011 7F 00 04 CLR BINV1
20 0014 7F 00 05 CLR BINV2
21 0017 CE 00 0D LDX #READ7 ; POINT TO FIRST DIGIT
22 001A 7E 00 44 JMP FIRST
23
24 001D 96 03 LOOP LDA A BINV0 ; MULTIPLY BINARY VALUE BY 10
25 001F 97 02 STA A TEMP5
26 0021 01 01 01 LDD BINV1 ; 2 SHIFTS = MULTIPLY BY 4
** UNRECOGNIZABLE MNEMONIC
27 0024 58 ASL B
28 0025 49 ROL A
29 0026 79 00 02 ROL TEMP5
30 0029 58 ASL B
31 002A 49 ROL A
32 002B 79 00 02 ROL TEMP5
33 002E DB 05 ADD B BINV2 ; ADD THE ORIGINAL = MULTIPLY BY 5
34 0030 99 04 ADC A BINV1
35 0032 01 01 01 STD BINV1
** UNRECOGNIZABLE MNEMONIC
36 0035 96 02 LDA A TEMP5
37 0037 99 03 ADC A BINV0
38 0039 97 03 STA A BINV0
39 003B 78 00 05 ASL BINV2 ; 1 SHIFT = MULTIPLY BY 10
40 003E 79 00 04 ROL BINV1
41 0041 79 00 03 ROL BINV0
42
43 0044 A6 00 FIRST LDA A 0,X ; ADD IN NEXT DIGIT
44 0046 9B 05 ADD A BINV2
45 0048 97 05 STA A BINV2
46 004A 24 08 BCC NEXT
47 004C 7C 00 04 INC BINV1
48 004F 26 03 BNE NEXT
49 0051 7C 00 03 INC BINV0
50 0054 09 NEXT DEX
51 0055 8C 00 06 CPX #READ0 ; ALL DONE?
52 0058 26 C3 BNE LOOP
53 005A 39 RTS
Assembled strictly for 6800, LDD and STD have quite rightly been rejected, but many of the assembled instructions, BRA, JMP, ASLA , ROLA, and more are identical. Other instructions like CLR BINV0 are only different because 6800 does not have a Direct addressing mode variant, while 6809 does have, and the 6809 opcode for CLR Extended is the same as for CLR Extended on 6800. But yes, there are many differences too.
6809 indexed addressing is very different to 6800. Besides the 0, 5, 8 and 16 bit offsets from X, Y, S or U, it also has register offset (A, B, or D) from X, Y, S or U, 0 offset from X, Y, S, or U with auto post-increment or pre-decrement by 1 or 2, 8 and 16 bit offsets from PC, and then a whole bunch of indirect indexed modes.