As I said earlier, that would be a one-position shifter.
No, I meant as in "Why is there no similar suggestion of an instruction pattern, for funnel shifting", for variable bit shift counts. And then I answered myself with "because the instruction set has multi-bit rotates, which mean you don't need pairs of instructions for shifting".
It's always interesting how often each is kind of focusing on one particular point, and misunderstandings follow. I was just thinking of multi-bit funnel shifting instructions, which would require 3 sources. So, as Bruce pointed out, they would simply be ruled out by default because this is expensive, and could be justified only in very specific cases and of course as long as there are a number of other instructions that could take advantage of 3 sources. Otherwise, I agree with Bruce that would be a waste for not much.
You mentioned "multi-bit rotates", but the RISC-V *base* instructions set doesn't have any rotate instruction that I know of. It has multi-bit shifting though. Is that what you meant?
The arithmetic shift instruction you're using next is not a rotate either. So, not sure what you meant above exactly with the rotates?
Otherwise, the piece of code you gave for dividing by 10 looks correct to me. Except for the LW instruction, which is a memory load, while you meant loading a constant. The correct assembly for this would be: "li rd, 3435973837" - which is a pseudo-instruction that (given the constant here) would require two instructions
(Note that the "M" extension contains integer divide. Some implementations only partially implement the M extension, but, IIRC, this would be non-standard, but is supported by at least GCC - and probably LLVM, dunno - using a specific option. RV32E does not define a stripped-down M extension, it only defines a reduced register file of 16 registers. And with that said, even if you do have an integer divide instruction available, your piece of code will probably be faster than using a divide, as long as the multiplier doesn't take as many cycles as a divide, which is a common thing.)
As to the instruction fusing suggested for the integer multiplication, that's a general recommendation. You can implement this in various ways, more or less complex. One I used (and that is pretty common as far as I've seen at least on simple implementations) is to issue a full 32x32->64 multiplication for all multiplication instructions and hold the last operands, mode and and result in registers, so that next time the same operation is required, it just fetches the result from the result register, and returns the corresponding half of the result. Simple and effective without requiring any fancy "instruction fusing" logic, and works however far apart the instructions actually are. Just a thought. This is a minor detail.