Author Topic: Programming with paged memory  (Read 8974 times)

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Offline WawavounTopic starter

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Programming with paged memory
« on: April 01, 2024, 06:04:57 pm »
Hi All,

On a vintage computer I expect to increase memory size with paged memory.
I will get
an 512 kb eprom from which I can see only one "page" of 512 bytes into the normal address space
a 128 kb ram again with 512 bytes visible into the space address.

Pages are selected by two 8 bits latches 74LS377 (one for the eprom and the other one for the ram).
In a first intention I dont want to use a mmu like MC6829. The system is TSC FLEX and should stay a single task system (just dual tasks using IRQ during batch printing).

I search technical documentations and examples of programs (I use 6809 assembler) in this situation.

Any information will be valuable.

Thanks and regards.

Offline srb1954

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Re: Programming with paged memory
« Reply #1 on: April 01, 2024, 07:16:04 pm »
A code page size of only 512 bytes is too small if you are using a S/W managed page selection scheme. Without a memory mapping IC you would have considerable trouble managing the page swaps and would be regularly changing pages as the code executes. In compiling code you would have also to make sure that each code module fitted into a 512 byte page and didn't inadvertently cross a page boundary.

I would recommend a page size of 4k as a more suitable size to make S/W managed page management more feasible.

Offline WawavounTopic starter

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Re: Programming with paged memory
« Reply #2 on: April 02, 2024, 06:26:51 am »
Unfortunately the cpu board and the address decoding map already exist.

So I have to do with only a small part of the address space available for the user.

And its my challenge to improve this computer without modification of the existent...

Offline xvr

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Re: Programming with paged memory
« Reply #3 on: April 05, 2024, 03:12:59 pm »
Hardware for page swaps is a simplest part. Software support for it is much more complex. MMU enables systems can completely hide page swap from user program, but this is not your case. User software should handle it manually.

The single arrangement for this is an Overlay system (as far as I know). Overlays required support from compiler (if it is high level compiler, like C). In your case (assembler) you will require support for Overlay from linker.

Overlay system has some limitation:
  • You should use stack for functions/procedures (in C it used automatically, for assembler you should use it mandatory)
  • Biggest procedure in Overlay part should fit in Overlay area (in your case - 512 bytes)
  • Only executable code can be overlayed, not Data
  • Overlay support code should resides in not overlayed area
  • Overlayed ROM code is possible, but required extra support

And the last one - there is no requirement for split area for ROM and RAM overlays, you can use one (1K preferably) for both

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