Poll

Which form factor do you want to see

Gum stick with dual USB-C ports
11 (47.8%)
Module with LGA land patterns
2 (8.7%)
Module with micro mezzanine connectors
10 (43.5%)

Total Members Voted: 23

Author Topic: [Poll] FPGA board form factor  (Read 5935 times)

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Online blueskull

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[Poll] FPGA board form factor
« on: September 06, 2019, 02:29:54 am »
I'm working on a Gowin Arora GW2A-18 FPGA module for integration and prototyping.

Which form factor do you think it's the best if you are looking for an FPGA module?

I'm aiming at development prototyping and very low volume prototype production runs.

FYI, the design features are as follow:

1. 21k 4-LUTs+16k FFs
2. 42Kb distributed SRAM+828Kb block SRAM+64Mb SDRAM
3. 48 M18 DSPs (24 DSP slices, each can be configured as dual M18 or single M36, both come with MAC/ALU options)
4. 2 PLLs+4 DLLs with on board 12MHz clock
5. 34 IOs in 4 1.2V~3.3V banks+31 IOs in 3.3V banks, most IOs are true LVDS capable
6. On board SPI FLASH+FTDI downloader+FTDI UART
7. Supports Cortex M1 (from Gowin), RiscV (from Gowin) and ZPU (from me)
8. On board PMIC accepting single 3.5V~5.5V input with input voltage sensor
9. On chip USB HS PHY IP (under development, using DLL, PLL and IO gearbox), tentative
10. A few LEDs for heart beat and debugging, maybe one or two micro buttons

As for form factor, I intentionally left out castellated hole option as I simply don't like it. I also left out HumanData's PLCC form factor as it's just to expensive.

Target total BOM is <$15 at 100 pieces batch.

Poll locked. Final form factor: DIP gum stick with micro USB-B and FPC expansion connector.
« Last Edit: September 14, 2019, 04:53:44 am by blueskull »
 

Offline DaJMasta

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Re: [Poll] FPGA board form factor
« Reply #1 on: September 06, 2019, 03:10:45 am »
Are LGA modules that easy to assemble into a low volume product?  Castellations would be hand solderable and as a result don't require anything fancy (not that I'm saying you should use them), but would an LGA module need special oven profiles or handling to use properly?  Could limit viability in small production runs, even though the overall cost is probably the cheapest.

I'd think USB C would be most desirable to the hobbyist level user, but it probably counts for less in commercial or industrial development environments.  If the mezzanine connectors themselves aren't too expensive, I'd probably go that route and make a breakout/development board with the mating mezzanine connectors and the USB C.  That way you have an easy-to-integrate module with a lower base price and a carrier board for more convenient prototyping.

If you were thinking of aiming primarily at the hobby market, maybe the USB C alone would be preferable, since the combination of a module and a carrier board would likely be a fair bit more expensive.


LGA is probably the cheapest to use in production runs, but it would probably be a pain to develop on.  Maybe if you had an LGA module and a USB C carrier board you could develop on the carrier version and then integrate only the module into the product - maybe a good balance in usability and price, especially if the mezzanines are going to be expensive or really low profile is an advantage.
 

Offline james_s

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Re: [Poll] FPGA board form factor
« Reply #2 on: September 06, 2019, 03:39:39 am »
I like 0.1" pin headers for GPIO and some more specialized connectors for high speed stuff like LVDS. It really depends on what one wants to build though.
 
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #3 on: September 06, 2019, 04:00:55 am »
Mezzanine connectors are cheap, just don't buy from a major distributor.
The problem is pitch. To keep the profile low, the pitch can not go beyond 0.5mm, which makes carrier board design a nightmare.

LGA can be dead bugged, and since I will only do top side loading, you can solder LGA as a normal larger BGA part (I can shrink the entire thing down to 20mm*20mm).

DIP is good, but high speed is a problem. I think it's more of a hobbyist-oriented form factor than a production package.

Maybe an LGA core module with a carrier board which has USB ports, mezzanine connectors for HS LVDS and DIP pins for breadboarding?
 

Offline Berni

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Re: [Poll] FPGA board form factor
« Reply #4 on: September 06, 2019, 05:45:51 am »
To be honest i don't really see the point in having a carrier board for such a FPGA chip.

From a quick look over the Gowin GW2A series its available in QFN and TQFP packages and if you want lots of pins also available in the nice big 1mm pitch BGAs that are reasonably easy to solder by hand. So if you are designing a board for this module to fit onto you might as well just solder the chip directly to it. The chips also look reasonable in terms of external support circuitry. Just needs 3.3V and 1.1Vcore and a SPI flash and on a small FPGA like this the Vcore could even be done with a simple LDO.

Yes 0.1in headers are the most friendly for prototyping but usually existing dev boards out there already offer plenty of those. What i have went to for my recent Lattice board is 0.5mm FPC connectors. This allows you to connect other boards to it via a flexible cables for convenience and a FPC connector is pretty easy to solder. These FPC cables can perform very well at high speeds if you put a ton of grounds on the pinout. No need to bother with fancy high speed cables, all you have to do is alternate signal and ground traces and this forms a nice transmission line, works well for LVDS too (In that case you go GND D+ D- GND D+ D- GND ...). Works with 1.27mm pitch ones too but not quite as well (I had 600Mbit MIPI running just fine over one of these tho).
 
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #5 on: September 06, 2019, 06:29:08 am »
So DIP+mezzanine/FPC?
 

Offline jhpadjustable

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Re: [Poll] FPGA board form factor
« Reply #6 on: September 06, 2019, 07:31:06 am »
There are FPC to DIP breakout boards all over Aliexpress. I'd imagine them suitable for extending I/O to the experimenter.

If you keep enough important signals at the edge and at roughly 1.27mm pitch, and place higher-density signals and returns near the center, a hobbyist could build a simple footprint with long-toed pads and nothing in the middle, then hand-solder the module to their board as if it were a large, wide-pitch QFN without wettable flanks.
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Offline chickenHeadKnob

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Re: [Poll] FPGA board form factor
« Reply #7 on: September 06, 2019, 07:53:31 am »
I chose "gumstik" only because I assumed this means card edge fingers down one side, and then thought maybe you use this term differently. Mezzanine boards with different connectors are a non-starter. If more than one connector the mezzanine board should  only be one connector height/type, I suggest samtec.

I also agree with Berni, the low pincount devices are easy to solder and I would just include the footprint on my own PCB.

I haven't been following the GOWIN threads closely, how fast can the RISC-V core implementation be clocked?
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #8 on: September 07, 2019, 12:34:57 am »
From the feedback I received, here's my next game plan:

0.6" wide 0.1" DIP with 2*12 pins for power, ground and 16 low speed IOs.
0.5mm FPC with 32 pins for 4 low speed IOs and 8 pairs of high speed IOs.

DIP pinout (all IOs are 3.3V):

VEXT    VSYS
V3V3    PBTN
RETN    RETN
LS01    LS02
LS03    LS04
LS05    LS06
LS07    LS08
LS09    LS10
LS11    LS12
LS13    LS14
LS15    LS16
RETN    RETN

FPC pinout (LS17, LS18, HS1~HS4 are VIO1, LS19, LS20, HS5~HS8 are VIO2):

VIO1    LS17    LS18    RETN    HS1P    HS1N    RETN    HS2P    HS2N    RETN    HS3P    HS3N    RETN    HS4P    HS4N    RETN
VIO2    LS19    LS20    RETN    HS5P    HS5N    RETN    HS6P    HS6N    RETN    HS7P    HS7N    RETN    HS8P    HS8N    RETN

Total board size is 18mm*36mm, and is wide DIP24 socket compatible.



One push button is provided on board, plus being routed to DIP header. Depending on when and how long it was pushed, it could be FPGA IO, FPGA reset, USB FPGA/FTDI mux switch or power button.

Four LEDs are provided, with amber LED serving as power LED or blink indicator for push button timer, and RGB LEDs for FPGA.

Any suggestions?
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #9 on: September 07, 2019, 08:03:07 am »
Update:

1. Changed USB-C to USB-uB for size concerns.
2. Added USB mux to allow single USB port to operate with FTDI and FPGA.
3. Added FTDI mux indicator and TX/RX indicator.
4. Moved button to center.
5. Added more LEDs to form a nibble.
6. Removed crystals and replaced with one always on 12MHz MEMS oscillator.

The following diagram did not show resistors, but those 0201 ones should squeeze well with every possible space.



The board looks routable with 4L HDI process.
 

Offline SiliconWizard

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Re: [Poll] FPGA board form factor
« Reply #10 on: September 07, 2019, 03:01:47 pm »
I'd vote for castellations as well (but that can be a bit costly to manufacture), otherwise the LGA thing. The version with 2.54mm TH and an FPC connector is nice for simple prototyping stuff, not so much for integrating with another PCB frankly. And I'd like to see more IOs broken out as well.

Of course you could offer both versions, which would address two different sets of needs.
 

Offline Kilrah

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Re: [Poll] FPGA board form factor
« Reply #11 on: September 07, 2019, 07:02:19 pm »
Keep the holes, AND add rows of castellations with more IO next to them. Those who want breadboard use the TH IO, those who want SMD use the castellated IOs, those who want loads of IOs find a way to use both that suits them.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #12 on: September 07, 2019, 09:43:59 pm »
Keep the holes, AND add rows of castellations with more IO next to them. Those who want breadboard use the TH IO, those who want SMD use the castellated IOs, those who want loads of IOs find a way to use both that suits them.

I'd love to, but as you can see from the picture, I'm really running out of routing space.

I probably can only have sufficient access to half of the pins (with 0.2mm/0.4mm vias and 0.1mm tracks) if I don't use HDI.

Even with HDI, without laser drills and plugged vias, I don't think I can fan out more pins.

Those QFNs are 0.4mm pitch ones and fanning out them can be hard.

I once did a half fanout on a 0.5mm QFN88 (ADSP-BF706), and that was hard enough.
 

Offline coromonadalix

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Re: [Poll] FPGA board form factor
« Reply #13 on: September 08, 2019, 03:21:25 am »

quote : Total board size is 18mm*36mm, and is wide DIP24 socket compatible.             Thats fine with me,  bread board compatible  etc ...   :-+

We had to design a special board at my job  to replace a xilinx xc9572  with an atf1504,  the board has castellation, and i can tell you for us its a nightmare to solder, sometimes the pads bridge together, we had to use a finer solder paste ... the castellation is not perfect on the board edges, sometimes i have to use a filer to clean it a little, its depends where your boards are made and the quality they can do / provide you.

For me its a no no

 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #14 on: September 08, 2019, 04:15:21 am »
the board has castellation, and i can tell you for us its a nightmare to solder

That's why I hate them. Even commercially made half vias can be tricky to solder, especially on small (no extension) pads and without a stencil.

Said from my experience with ESP32-WROOM and SIM7000G.
 

Offline pigrew

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Re: [Poll] FPGA board form factor
« Reply #15 on: September 08, 2019, 05:12:34 am »
If there is a spare FPGA pin, it would be good to be able to disable the oscillator (controlled by the FPGA) for low-power modes.

Power supply is always a tricky thing. It'd be nice if one can power the board from either 3.3V or 5V. Does it work if I connect 3.3V to the VEXT pin, or do I need to connect it directly to the V3V3 pin?

I've started to really rather USB-C over micro-USB due to their robustness. USB-C is about 9x8mm, whereas microB is ~6x7. Could enough of the port be hanging off the edge of the PCB that they are about the same?

How do you plan to do the USB? Bit-banging? Or is there a PHY? Is the differential transceiver in the FPGA good enough to serve as a PHY? What about enable-disable of the USB pullup? Is it full speed or high speed? Would something like USB3322 fit? On the other hand, I have not had any use cases where I would need high-speed.

I don't have the datasheet open, but are there clock input pins that are broken out?

Since it's being through hole, are there any components on the bottom? Maybe add a footprint for SDRAM (or something else?) on the bottom that the user could add, which wouldn't be part of the standard build?

Is one able to both program the flash (for non-volatile usage) and the SRAM of the FPGA (for debugging)?
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #16 on: September 08, 2019, 05:20:01 am »
which PCB software are you using? I hope you use Altium! ;D
I'm a Digital Expert from 8-bits to 64-bits
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #17 on: September 08, 2019, 05:31:34 am »
1. If there is a spare FPGA pin, it would be good to be able to disable the oscillator (controlled by the FPGA) for low-power modes.

2. Power supply is always a tricky thing. It'd be nice if one can power the board from either 3.3V or 5V. Does it work if I connect 3.3V to the VEXT pin, or do I need to connect it directly to the V3V3 pin?

3. I've started to really rather USB-C over micro-USB due to their robustness. USB-C is about 9x8mm, whereas microB is ~6x7. Could enough of the port be hanging off the edge of the PCB that they are about the same?

4. How do you plan to do the USB? Bit-banging? Or is there a PHY? Is the differential transceiver in the FPGA good enough to serve as a PHY? What about enable-disable of the USB pullup? Is it full speed or high speed? Would something like USB3322 fit? On the other hand, I have not had any use cases where I would need high-speed.

5. I don't have the datasheet open, but are there clock input pins that are broken out?

6. Since it's being through hole, are there any components on the bottom? Maybe add a footprint for SDRAM (or something else?) on the bottom that the user could add, which wouldn't be part of the standard build?

7. Is one able to both program the flash (for non-volatile usage) and the SRAM of the FPGA (for debugging)?

1. The PMIC controls the OSC. If FTDI USB MUX is enabled and not suspended, then OSC is on. If not, the OSC can be enabled over I2C.

2. VEXT goes to PMIC. The FPGA can operate at 3.15V min, and the PMIC has a drop out 0f 100mV, thus, the system can happily operate at 3.3V +-1%. 3.3V pins can NOT be fed directly as that will cause current to flow back through body diode of PMIC and potentially damage it. Also, other rails (1.0V, VIO1, VIO2) are generated from VSYS, not V3V3. VEXT and VUSB are multiplexed to VSYS (with VEXT having higher priority).

3. The space is at extremely premium, so is the thickness. I'd like to add USB-C, but space really doesn't allow me.

4. USB it bit banged. GW2A has LVDS transceivers, and bias is generated externally and they can operate at a very wide VCM range, thus allowing MIPI emulation (with LVCMOS pins for LS tx/rx and termination switching). MIPI with 3.3V LSIO is compatible with USB HS. With LVDS in high-Z, the two LVCMOS pins serve as USB FS/LS transceiver. PU/PD are done with another two IO pins with corresponding resistors.

5. Clock pins are shared with LVDS pins. The FPC connector has some differential pairs that are also GCLK capable. Also, at least one LSIO is single ended GCLK capable.

6. Routing such a high pin count, high loading factor board without HDI is already hard enough. I don't want to add complexities. FYI, my usual stack up is top-parts, local interconnection, mid 1-power/ground, mid 2-remote interconnection, bottom-ground. This stack up doesn't allow bottom side loading. Anyway, this chip comes with copackaged 64Mb 3.3V SDRAM.

7. Yes. Gowin tools support programming to SRAM or (a selected range of) flash.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #18 on: September 08, 2019, 05:32:07 am »
which PCB software are you using? I hope you use Altium! ;D

I paid totally more than $12k on it over the years. Why would I not use it?
« Last Edit: September 08, 2019, 05:33:40 am by blueskull »
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #19 on: September 08, 2019, 06:53:17 am »
Since this is very space constrained I think it's a good idea to not adhere to a fixed stackup. It is possible to have an effectively solid ground even if every ground plane looks cut into pieces if you have vias stitching them in in strategic places. I would highly recommend placing passives on the bottom side of the board because it would provide better decoupling as well. I would personally also put the spi flash right under the FPGA. At 18*36mm this doesn't look very difficult to route at all, so I can volunteer to do the PCB layout but I can't do altium (gEDA only).
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Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #20 on: September 08, 2019, 07:07:50 am »
When I design boards I never dedicate layers to roles; all layers are treated equally. Every layer starts off with a solid ground fill, and components are placed on either side in clusters to minimize distances. From then on routing is very ad-hoc but there are a few rules; high speed signals require a solid ground plane but only right under the signals. It doesn't matter if the ground is broken elsewhere so I route low speed signals on the ground plane at will provided it doesn't cross any high speed traces. There are also a few circumstances where you *can* run a trace under a component, for example if that component is a decoupling cap because its body is considered RF ground. Typically most passives on the bottom side are for decoupling so I generally prefer to route signals on in2. There is, of course, a ground fill on the bottom side but it need not be solid because all the "breaks" caused by decoupling caps are not considered breaks.
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #21 on: September 08, 2019, 07:09:34 am »
Since this is very space constrained I think it's a good idea to not adhere to a fixed stackup. It is possible to have an effectively solid ground even if every ground plane looks cut into pieces if you have vias stitching them in in strategic places. I would highly recommend placing passives on the bottom side of the board because it would provide better decoupling as well. I would personally also put the spi flash right under the FPGA. At 18*36mm this doesn't look very difficult to route at all, so I can volunteer to do the PCB layout but I can't do altium (gEDA only).

Thanks for the offering! I'll sure let you know if I can't do it (which may very well happen!).

As for this particular stack up and single sided loading, I do have three concerns:

1. It leaves a pure solid ground bottom layer with only few vias connecting to other nets. This reduces risk of shorting if the core module is not spaced from the top surface of the carrier board.
2. It leaves no parts to be bumped into. MLCCs can crack, and short catastrophically, and I've seen a few occasions.
3. It allows for LGA-style termination on non-soldered DIP pads.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #22 on: September 13, 2019, 09:07:25 am »
Draft of schematic is attached here: https://1drv.ms/u/s!AkXnLOXZOgKpmCRACVRCCtURDY_A?e=dHZj0R

FTDI EEPROM is removed as I found it's not needed for Gowin programmer to talk to debugger. My Trenz board came with empty EEPROM.

Comments?
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #23 on: September 13, 2019, 09:50:14 am »
The BOM doesn't look very optimized, but these things stand out:

1. Really seriously consider alternatives to the FT2232. It's a big cost adder and even if you need true usb-fifo-gpio functionality a cheaper micro can usually do the job for under $1.
2. Please avoid SiTime MEMS oscillators. They cost more than surface mount TCXOs and the performance is way inferior to cheap smd powered crystal oscillators, which are easy to find on LCSC.
3. The choice of connectors seem on the expensive side; I would suggest starting your search on LCSC rather than digikey/mouser because you will often find low cost good quality connectors from Japanese or Taiwanese manufacturers that you won't find on digikey.

As it is the BOM cost is higher than the NanoVNA V2  ;)

Also maybe add a pdf schematic because I can't open those files. Better idea, switch to kicad/geda or at least easyeda  ;)
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Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #24 on: September 13, 2019, 10:17:09 am »
Just noticed the tantalum caps  :palm:
47uF isn't a very large capacitance for standard MLCC at 1.0V. That tantalum has an ESR of 300mOhm which is kind of shitty (a 22uF MLCC will have < 100mOhm). I would recommend 2 x 22uF 0603 MLCC caps instead; you probably don't want to use just a single cap for the entire 1.0V rail (I would go for 4 caps, one for each "side" of the FPGA, but 2 most likely will work).
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #25 on: September 13, 2019, 06:34:52 pm »
1. Really seriously consider alternatives to the FT2232. It's a big cost adder and even if you need true usb-fifo-gpio functionality a cheaper micro can usually do the job for under $1.
2. Please avoid SiTime MEMS oscillators. They cost more than surface mount TCXOs and the performance is way inferior to cheap smd powered crystal oscillators, which are easy to find on LCSC.
3. The choice of connectors seem on the expensive side; I would suggest starting your search on LCSC rather than digikey/mouser because you will often find low cost good quality connectors from Japanese or Taiwanese manufacturers that you won't find on digikey.
4. Also maybe add a pdf schematic because I can't open those files. Better idea, switch to kicad/geda or at least easyeda  ;)
5. 47uF isn't a very large capacitance for standard MLCC at 1.0V. That tantalum has an ESR of 300mOhm which is kind of shitty (a 22uF MLCC will have < 100mOhm). I would recommend 2 x 22uF 0603 MLCC caps instead; you probably don't want to use just a single cap for the entire 1.0V rail (I would go for 4 caps, one for each "side" of the FPGA, but 2 most likely will work).

1. FT2232H is a must. Gowin's official programmer software uses FT2232H's MPSSE mode to implement JTAG. I can dumb it down to FT232H, but for $0.8 saving, neutering a second channel which can be used for UART, is not the best option.

2. FT2232H is stupid. Its PLL doesn't take in the standard 24MHz, but 12MHz. The lower the frequency, the larger the physical size the resonator has to be. For 12MHz, there's no resonators or oscillators available in the size I'm looking for (2016/1612).

3. Size. Molex 503480 is the only part I can find that can pack 32 pins at 0.5mm pitch into an 18mm overall width (0.4mm is too hard on customer's board, if someone can easily deal with 0.4mm FPC, they won't need a breakout for 0.4mm QFN88). I can only fit a 26 pin FPC than the current 32 pin one if I use Omron XF2/3, so I have to nerf the system 5V, IO 3.3V, I2C and push button pins. The Molex USB connector can be replaced with exact Chinese copy, but the shipping is not worth it (unless JLCPCB can ship parts with PCB without stuffing them).

I'm not stuffing the boards by JLC. Trump tax is too much for anything more than $400 (personal tax exemption limit), so is Xi tax for US parts without an import/export tax exemption license. The cheapest way for me would be PCB by JLC or JDB, and all active parts from Mouser/DK, then stuff the parts in the US.

4. In the next release (hopefully today) I will include a PDF schematic plot and in future, PCB plot. I'm just too used to Altium, though I'm learning KiCAD. Maybe I will eventually release it in KiCAD format if I plan to hit HaD.

5. Good idea. I changed it to 4*10uF 0402 6.3V X5R from Murata (8uF at 1V bias). Overall cost is around halved, and I have much better routing flexibility, while I no longer have to deal with the nasty moisture absorption issue with tantalum caps.
 

Offline SiliconWizard

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Re: [Poll] FPGA board form factor
« Reply #26 on: September 13, 2019, 08:02:55 pm »
1. FT2232H is a must. Gowin's official programmer software uses FT2232H's MPSSE mode to implement JTAG. I can dumb it down to FT232H, but for $0.8 saving, neutering a second channel which can be used for UART, is not the best option.

Yep. Funny how many people go bonkers as soon as they see the word "FTDI" somewhere. Yet FTDI parts are everywhere. And they just work.
And yes, for JTAG access, they are great. Many vendors' programmers use them, because their MPSSE engine works great for JTAG/SWD, and is trouble-free.

Just one suggestion. If it's "routable"... because your board's going to be pretty dense already.
It would be nice if you routed all required signals from the second channel of the FT2232H to access it as synchronous FIFO (I don't remember if you can use the second channel in synchronous mode, something to check). That's basically an 8-bit data bus, a clock out signal and a few control pins. The synchronous FIFO mode is the only one with which you can get the max data throughput (~30MBytes/s in practice).

Ignore that if 1/ channel two can't be used in this mode and 2/ you don't have enough room to route that, or enough spare IOs...
But just saying, I find it a shame that many dev boards using a FT2232H or FT232H don't allow you to use synchronous FIFO mode. UART only access gets you like 300KB/s max (for the highest baud rate of 3MB/s), asynchronous FIFO mode, only like 8MBytes/s max (which is already much better), but for only 1 additional pin (the clock), you can get the full throughput...
« Last Edit: September 13, 2019, 08:07:03 pm by SiliconWizard »
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #27 on: September 13, 2019, 08:54:37 pm »
Just one suggestion. If it's "routable"... because your board's going to be pretty dense already.

It's a bit challenging considering I don't even have enough pins, let alone routing space...

« Last Edit: September 13, 2019, 09:57:24 pm by blueskull »
 

Offline SiliconWizard

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Re: [Poll] FPGA board form factor
« Reply #28 on: September 13, 2019, 08:57:52 pm »
Ok nevermind... maybe you can think about that for a bigger dev board or something.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #29 on: September 13, 2019, 08:59:59 pm »
Ok nevermind... maybe you can think about that for a bigger dev board or something.

Maybe I'll use that as an incentive to get my bit bang USB HS PHY to work.
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #30 on: September 14, 2019, 01:56:23 am »
I think you are overestimating the tariffs. The cost difference between mouser/dk and shenzhen market more than makes up for the tariffs. I think a better option is to do everything from china and ship directly to end users while underdeclaring value. Most of the parts you are using don't really need to be imported.
 
I still think more effort needs to be put in BOM cost reduction because at $20 (and that doesn't include assembly) you will probably have to sell at $50 or so, which is a bit much for a module that people are going to incorporate into projects. de0-nano has existed for years at a lower price point so why wouldn't people just buy that?

If JTAG is for programming only, look into implementing the protocol on a micro and providing your own programming software. USB FS is fast enough to transfer the bitstream in 1-2 seconds.

$1.5 for a fpc connector is BS. I would move decoupling caps to the bottom of the board and use an ordinary FPC connector. Specialized parts should be avoided whenever possible.

With a bit of effort I think the BOM cost can be reduced to $10 or so, which means a sell price of $25 which is far more competitive.
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Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #31 on: September 14, 2019, 03:16:26 am »
A 1 minute search found this: https://item.szlcsc.com/305537.html which fits 30 pins into 17mm. Really look harder and look beyond the western brands next time ;) not to mention Molex is known for subpar quality given the price.
« Last Edit: September 14, 2019, 03:18:02 am by OwO »
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #32 on: September 14, 2019, 03:35:29 am »
1. I think you are overestimating the tariffs. The cost difference between mouser/dk and shenzhen market more than makes up for the tariffs. I think a better option is to do everything from china and ship directly to end users while underdeclaring value. Most of the parts you are using don't really need to be imported.
 
2. I still think more effort needs to be put in BOM cost reduction because at $20 (and that doesn't include assembly) you will probably have to sell at $50 or so, which is a bit much for a module that people are going to incorporate into projects. de0-nano has existed for years at a lower price point so why wouldn't people just buy that?

3. If JTAG is for programming only, look into implementing the protocol on a micro and providing your own programming software. USB FS is fast enough to transfer the bitstream in 1-2 seconds.

4. $1.5 for a fpc connector is BS. I would move decoupling caps to the bottom of the board and use an ordinary FPC connector. Specialized parts should be avoided whenever possible.

5. With a bit of effort I think the BOM cost can be reduced to $10 or so, which means a sell price of $25 which is far more competitive.

6. A 1 minute search found this: https://item.szlcsc.com/305537.html which fits 30 pins into 17mm. Really look harder and look beyond the western brands next time ;) not to mention Molex is known for subpar quality given the price.

1. Most of my parts are cheaper in Mouser than LCSC, rest of some connectors and RLCs. Since you later mentioned that HRS connector, I think that should justify the shipping, and I will move some RLCs and other possible parts to LCSC.

I don't have to under declare. If FOB price is below a certain value (~$100), personal import tax is exempted in most countries.

But since I'm in USA, if I stuff all boards in China, the large batch of 100 will certainly exceed the exemption and I don't want to mess with US customs.

As for distribution, I don't want to use ePacket as it's not available to common people, and China Post EMS is actually more expensive than USPS, so shipping from US at low quantity is actually cheaper.

2. Try to plug DE10-N into a DIP socket. Yes, I have that board, and I have even made an official tutorial series for TerASIC on DE10-STD based on Cyclone V SX.

3. JTAG can be used for logic analyzing, which is supported by Gowin chips. If downloading is all what I need, yes, I can use nothing but an USB MCU or even USB SPI bridge to talk to the GD25 while keeping FPGA in reset (high-Z).

4. I took your advice and replaced with that HRS part.

5. Without FTDI, $12 should be possible.

6. That's wonderful.
 

Offline BravoV

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Re: [Poll] FPGA board form factor
« Reply #33 on: September 14, 2019, 03:45:04 am »
As enthusiast, just want to say I am grateful and conveying my appreciations reading the intense technical discussions of you two.  :-+

Back into observing, learning and lurking mode.

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #34 on: September 14, 2019, 04:15:03 am »
1. ePacket is actually available to individuals; I ship like 5 packages a month and they still keep my account open. You have to first register on shipping.ems.com.cn (I just filled in "N/A" for 公司名称 and they didn't say anything about it), then contact EMS customer service to ask them to activate your account. (You need someone who can speak chinese for this part). The prices are posted here: http://shipping.ems.com.cn/product/findDetail?sid=400032

One thing to be careful about is China Post and EMS are separate divisions, and if you walk into a random China Post office they will know absolutely NOTHING about ePacket and quote you outrageous prices. You must go to a EMS logistics office which are more rare; one way to tell is that these look far more messy (big room, packages on the floor everywhere).

In shenzhen there are also proxy shipping services that will let you access far more shipping methods (e.g. postNL which is cheaper for EU destinations, and other methods that allow shipping lithium batteries). The prices are comparable to ePacket. You only need to take a short walk around HQB to find these. There are so many misconceptions about shipping from china on the internet that I don't know where to begin.

2. https://shop.trenz-electronic.de/en/TEI0003-02-CYC1000-with-Cyclone-10-FPGA-8-MByte-SDRAM?c=480
For a rough overview of market position:
$18 - Anlogic EG4, 20000 LE - https://www.seeedstudio.com/Sipeed-TANG-PriMER-FPGA-Development-Board-p-2881.html
$35 - Cyclone 10, 25000 LE, small form factor - CYC1000
$60 - Artix 7, 100k LE - "QMTECH core board"

3. OK that makes sense. In that case I would put the effort into looking for a clone or make a clone  ;)
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #35 on: September 14, 2019, 04:49:15 am »
1. ePacket is actually available to individuals; I ship like 5 packages a month and they still keep my account open.

3. OK that makes sense. In that case I would put the effort into looking for a clone or make a clone  ;)

1. Only if I have a manufacturing/shipping agent in China.

3. Do you want a few IOs reserved and connected to FPGA JTAG in case you want to have fun? Tentatively I'm choosing GD32F150 in QFN2832 package with external 24MHz crystal (also allows small size, low cost and clock sharing with FPGA, 3 birds one stone).

//Edit: I was going for CH549F, but considering the lack of English documentations, I think I'll settle on GD32 for now. Cypress PSoC4 is also an option for UDB-based JTAG, but the packaging size is less than favorable. The last thing I want is another 0.4mm pitch large QFN.

//Edit 2: QFN28 package can't be used. It doesn't have low jitter clock output pin (PA8), so it can't supply clock to FPGA without excessively loading the XTAL.
« Last Edit: September 14, 2019, 07:03:49 am by blueskull »
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #36 on: September 14, 2019, 05:26:19 am »
Please Stick to Alitum ^-^
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #37 on: September 14, 2019, 07:39:57 am »
@OwO: if you have a time, can you check my BOM to see if anything needs to be further optimized? It's now 100% LCSC plus manufacturer webstore.
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #38 on: September 14, 2019, 11:27:44 am »
Looks pretty good now  ^-^
Make sure to use pins from the same IO bank on the stm32 for JTAG interfacing; that way DMA can be used to transfer commands quickly.
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #39 on: September 15, 2019, 08:24:52 pm »
Many changes so far:

1. FTDI JTAG/UART bridge removed, in favor of a much cheaper GD32 MCU. The MCU can communicate with FPGA using SPI (multiplexed with FLASH) and UART (multiplexed with LS01 and LS02).

2. SiTime MEMS removed, in favor of plain crystal resonator. The MCU is capable of generating clock and output a clean clock on its own, plus the FPGA is capable of cleaning up jitter using its own PLL, thus a dedicated oscillator is no longer needed.

3. Majority of passives are replaced with 0201 for a larger layout space. Non-HDI seems to be very possible now.

4. LED quantity reduced to 5, power LED also serves as Rx/Tx LED, USB mux indicator LED and multifunction push button timer indicator LED. User LEDs remain. LEDs are moved to under USB connector to optimize routing for input ferrite beads and fuses.

5. Flash replaced with DFN 2*3 package, which opens a lot of options than the GigaDevice unicorn from nowhere other than DigiKey.

6. All parts are replaced with LCSC-obtainable parts for Chinese manufacturing (JLCPLC). I'll find a solution for global distribution. I do have a store front in HK, or maybe some forum members can help?

7. Component placement is practically frozen. Unless there is a really compelling reason to change, the Visio draft should be the final placement. It is made to scale, and closely resembles final placement.

« Last Edit: September 15, 2019, 08:26:35 pm by blueskull »
 
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Offline coromonadalix

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Re: [Poll] FPGA board form factor
« Reply #40 on: September 16, 2019, 12:30:48 am »
maybe add an daughter board / breakout board project for your fpc 30 pins connector ???
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #41 on: September 18, 2019, 09:10:45 am »
Schematic posted in PDF.

maybe add an daughter board / breakout board project for your fpc 30 pins connector ???

Once the main board is done, I will make a breakout board for FPC30 in a similar DIP form factor.
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #42 on: September 18, 2019, 09:58:07 am »
A suggestion, you might not want to expose your real name and details like that; I think it's a good idea to always operate under fictitious names and identities and never link them; see here: https://www.eevblog.com/forum/chat/richard-stallman-(gnu-dude)-resigned/
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #43 on: September 18, 2019, 04:22:24 pm »
A suggestion, you might not want to expose your real name and details like that; I think it's a good idea to always operate under fictitious names and identities and never link them; see here: https://www.eevblog.com/forum/chat/richard-stallman-(gnu-dude)-resigned/

I want to be known, and that includes my attitude of "no f*cks given".

It's not like you can hide -- Google always knows who you really are.

As for RMS, apparently he is going to retire regardless at his age.

If he doesn't, refer to Bob Widlar. Apparently not everyone cares about PC and the consequences.
 
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #44 on: September 19, 2019, 09:19:01 am »
Revised SCH, updated placement layout by a little bit, finished PCB library.

OneDrive link remain the same: https://1drv.ms/u/s!AkXnLOXZOgKpmCRACVRCCtURDY_A?e=dHZj0R.
 
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #45 on: September 21, 2019, 11:11:02 pm »
Update: PCB footprint and placement done, ready for layout. Actual size: 17.5mm*35.0mm.



Altium 3D doesn't work properly in Parallels VM, so I had to zoom many times and switch between 2D/3D many times to try my luck in order to get the correct 3D to show. Altium/Parallels/Apple, please fix.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #46 on: September 23, 2019, 05:42:44 am »
Post-placement revised schematic is attached, along with draft datasheet of the product.
 

Offline OwO

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Re: [Poll] FPGA board form factor
« Reply #47 on: September 23, 2019, 06:11:28 am »
What are the board specs you used? I don't see much space for vias in that picture you posted. Is there a reason you aren't putting components on the bottom side?
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #48 on: September 23, 2019, 06:16:22 am »
What are the board specs you used? I don't see much space for vias in that picture you posted. Is there a reason you aren't putting components on the bottom side?

The picture is placement only, no routing or vias.

I used 0.2mm/0.45mm vias, 0.1mm traces and 0.125mm via-trace spacing. Aka, JLCPCB specs.
 

Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #49 on: September 26, 2019, 04:19:35 pm »
After almost a week of exhaustive attempts, I have to give up JLCPCB. Their 0.45mm minimum via size and 0.125mm minimum via to trace clearance makes routing very hard, impossible for me.

I have to bump up the service to WellPCB and their 0.1mm trace, 0.2mm drill, 0.1mm annular ring service. The price look the same, but that's only automatic quoting. Actual price is a YMMV thing.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #50 on: September 26, 2019, 10:47:24 pm »
Please update us on the PCB service and the price that you would get, I have similar problem with JLCPCB and their spec, I can not route a 0.65mm BGA cheap |O :palm:
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #51 on: September 26, 2019, 10:53:44 pm »
Please update us on the PCB service and the price that you would get, I have similar problem with JLCPCB and their spec, I can not route a 0.65mm BGA cheap |O :palm:

www.wellpcb.com

The online-quoted price is actually below JLCPCB's price, but WellPCB is known to change price during audition, so who knows.

Once I have the order placed, I will update.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #52 on: September 27, 2019, 09:20:14 am »
Thanks, But I have checked it and the price for 2 layer and 4 layer was way higher, for 2 layer 100m X 100m it's about 5$ in JLCPCB it's 2$, And for the 4 layer 50mm X 50mm  is about 36$ , with that spec it's 13$ in JLCPCB:-X
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #53 on: October 01, 2019, 07:06:01 pm »
Bit of update, I removed JTAG support after obtained certain negative reply from Gowin. They are not going to give me the JTAG specs, and unlike Lattice programmer, Gowin hard coded JTAG JAM files to their binary, so I can't really extract it. Also, I'm not going to waste my time to intercept FTDI driver or use a logic analyzer to reverse their protocol.

Since the QN88 doesn't have SSPI mode, I will have to settle on MSPI flash method (MCU flashes ROM while FPGA is held in tri-state reset, then MCU releases SPI and reset, FPGA configures from flash).

Also, GD32 MCU replaced with CH552 MCU in TSSOP20 package, placement changed to accommodate a larger package. 12M/24M crystal removed in favor of internal clock. FPGA IOs used as oscillator for crystal resonator when accurate clock is needed. This also makes sleep mode power management easier.
 

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Re: [Poll] FPGA board form factor
« Reply #54 on: October 21, 2019, 06:51:55 am »
A bit of update:

1. PCB in fabricated by JLCPCB, waiting for DHL to deliver it.
2. Part ordered from LCSC, stencil ordered from OSHStencil.
3. HS USB PHY being explored, and it seems it is more than feasible. With a Verilog soft IP DDR receiver and half rate Alexander phase detector I was able to meet timing requirements. Gearbox is not used in this case as Gearbox has internal retiming, so phase information is lost. Tx side uses 1:8 gearbox, just to save a few tens of mW of power.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #55 on: October 21, 2019, 08:08:36 am »
thumbs up, :-+ Is the schematics open?
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Re: [Poll] FPGA board form factor
« Reply #56 on: October 21, 2019, 08:16:57 am »
thumbs up, :-+ Is the schematics open?

Here it is.
 

Offline ebclr

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Re: [Poll] FPGA board form factor
« Reply #57 on: October 21, 2019, 11:20:41 am »
Where  can the Gowin synthesis software be downloaded with the hassle of not having  a Chinese phone, I guess without this software the board will be useless
 

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Re: [Poll] FPGA board form factor
« Reply #58 on: October 21, 2019, 03:49:41 pm »
Where  can the Gowin synthesis software be downloaded with the hassle of not having  a Chinese phone, I guess without this software the board will be useless

I didn't use a phone number. Just a corporate email.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #59 on: October 22, 2019, 06:28:24 am »
Quote
Here it is.
Thanks :-+
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Offline dmendesf

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Re: [Poll] FPGA board form factor
« Reply #60 on: November 10, 2019, 04:23:26 am »
Blueskull, are you selling these boards? This FPGA+SDRAM intrigues me and I want to play with it.
 

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Re: [Poll] FPGA board form factor
« Reply #61 on: November 10, 2019, 04:57:13 am »
I'm prototyping the first batch. Once it proves working, I'll roll it in quantity.
 

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Re: [Poll] FPGA board form factor
« Reply #62 on: November 15, 2019, 06:31:41 am »
The first prototype is done. There are some DNP parts and a bodged part as an after thought.

[attachimg=1]

[attachimg=2]

Since JLCPCB indeed can build the board despite exceeding their claimed specification, I decide to let them to also do the 0201s in the production batch.
I'll then apply some fresh flux to solder the PMIC and FPGA as they are not available from LCSC.
 

Offline TheHolyHorse

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Re: [Poll] FPGA board form factor
« Reply #63 on: November 15, 2019, 07:18:55 pm »
Looks really good :-+
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #64 on: November 16, 2019, 06:24:39 am »
you look sexy and you know it :-+ :-+ :-+
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Re: [Poll] FPGA board form factor
« Reply #65 on: November 16, 2019, 07:40:10 am »
Just finished debugging this thing.

Some finds:

1. CH552 enters ISP mode regardless ISP pin settings for the first time when FLASH is empty.
2. MT9700 power MUX is a trap. It didn't say it has a discharging circuit but it does, so the board needs a revision. Also it has a protection diode from OUT to ENA (WTF?), so pulling ENA low can fry it. Or I could just get a similar but fake from LCSC.

I'm now debugging without power MUX (USB VBUS only) and I'll try to get CH552 firmware to talk to my computer today.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #66 on: November 24, 2019, 07:52:11 am »
That's good progress! keep up the work :-+
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #67 on: December 04, 2019, 02:57:09 am »
Updates:

1. MCU code in progress, bitbang I2C finished, unprogrammed PMIC can now boot from MCU. SPI driver done, flash ROM access is done.
2. USB driver in progress, enumeration is fine, no protocols implemented, ATM I will stick with BULK-only and all functions done in user level with libUSB. No ACM/CDC until new developers jump on board.
3. PCB bugs found, new PCB in progress. MT9700 is buggy, and it has an undocumented discharge resistor, which is a bummer. Its reverse current detector is also not good. It was removed and 2:1 power MUX is thus removed, in favor of USB power only. Other minor logic bugs found and solved.
4. LVDS reduced from 8 pairs to 6 pairs due to poor 28P China made friction lock FFC connector availability. 24P is abundant. New board accommodates both 20P and 24P.
5. Added PMIC LED to reduce swearing during debugging.

[attach=1]
« Last Edit: December 04, 2019, 03:30:33 am by blueskull »
 
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Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #68 on: January 16, 2020, 12:50:41 pm »
what sort of Current does the V-Core use? I'm designing with Gowin PFGA(the exact part you are using in here) and I'm considering EUP3458 as a buck for generating the 1.0v VOCRE, is 600ma - 1A sufficient ? what did you use for generating vcore?
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #69 on: January 16, 2020, 03:12:00 pm »
what sort of Current does the V-Core use? I'm designing with Gowin PFGA(the exact part you are using in here) and I'm considering EUP3458 as a buck for generating the 1.0v VOCRE, is 600ma - 1A sufficient ? what did you use for generating vcore?

I was using a 150mA P-MOS load switch configured as a makeshift buck converter to generate Vcore, at 150mA RMS on high side, I can theoretically generate 350mA output.

Vcore usage is highly dependent on design. In a few simple designs I've done, Vcore has been below a few tens of mA.

I presume if you switch all logic elements at Fmax you might need 1A or more.

Trenz board used a 2A Intel (Altera/Enporion) buck SiP module.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #70 on: January 16, 2020, 08:54:11 pm »
Thanks :-+
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #71 on: February 14, 2020, 07:06:25 am »
From my experience with my prototype, my design was extremely hard to use due to the very long time it takes to program SPI thus reducing development productivity.

Luckily, Gowin has recently released the JTAG specification, so now I can implement a JTAG controller with MCU.

Next step: roll another board with native JTAG support. I need a way to multiplex things as my MCU has limited pins. Or maybe I should just use a better chip than CH552E.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #72 on: February 15, 2020, 07:03:58 am »
Quote
Luckily, Gowin has recently released the JTAG specification, so now I can implement a JTAG controller with MCU.
That's good news, where is the link?
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #73 on: February 15, 2020, 08:20:24 am »
Quote
Luckily, Gowin has recently released the JTAG specification, so now I can implement a JTAG controller with MCU.
That's good news, where is the link?

On their website once you log in. First page nuder GW2AR document section.

Just in case, I'm putting a copy down here.
 
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Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #74 on: February 16, 2020, 07:14:44 am »
Thanks :-+
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Offline ebclr

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Re: [Poll] FPGA board form factor
« Reply #75 on: September 28, 2020, 09:11:20 am »
Sugestion , Put a 1 Led or 2 , To and deliver with the LedBlink VHDL loaded, This can be helpful to starters
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #76 on: September 28, 2020, 11:03:54 am »
Any progress regarding JTAG bit-bang with the MCU?
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #77 on: September 28, 2020, 12:56:20 pm »
Any progress regarding JTAG bit-bang with the MCU?

Yes. I'm working on a commercial gw1nr board and I'm boot loading it with ch552. It is still wip and I'll open source as much as I can.
 
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Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #78 on: September 29, 2020, 06:25:26 am »
Thanks, that's great, Also I'm working with Gowin now, my main problem is the lack of simulation models for IP cores, How do you debug your code? have you found any work around the simulation?
It really has stucked me |O
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #79 on: September 29, 2020, 11:15:39 am »
Thanks, that's great, Also I'm working with Gowin now, my main problem is the lack of simulation models for IP cores, How do you debug your code? have you found any work around the simulation?
It really has stucked me |O

I don't simulate. I pull critical nets to pins and probe them.
 
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #80 on: October 17, 2020, 02:47:13 pm »
While I'm still working on the CH552 port of it, I figure I can just upload the official JTAG program I obtained from the FAE for loading into SRAM.

Loading into external flash is possible, but I don't have the program.
 

Offline ali_asadzadeh

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Re: [Poll] FPGA board form factor
« Reply #81 on: October 20, 2020, 11:46:32 am »
Thanks for sharing ;)
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Online blueskull

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Re: [Poll] FPGA board form factor
« Reply #82 on: October 23, 2020, 06:54:48 am »
 


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