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(Yet Another) DIY Multislope ADC

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The capacitance at the input switch should not be that relevant, as it is not operated that often. Usually the swiches for the input and references are the same anyway to get compensation of R_on drift.
The swiching times are usually longer than just Ron*C_switch. Chances are a large part is from the gate drive stage with a significant higher resistance. So it is more that internal stage to set the speed.
R_on * C_switch woud be some 20 ohms * 10 pF = 200 ps, which is faster than the actual swiching speed.

The speed on fast the ref. input node settles to the new voltage is also determined by the integrator - usually the integrator input is not a perfect virtual ground, but needs some time (e.g. 100-500 ns) for the integrator input to settle. The swich common node is also normally aready at R_on*Iref, as the same I_ref is flowing essentially all the time, just switching between the 2 paths. It is more typical to have a short break before make time in which the node can charge up even higher. The capacitance here limits how far the voltage spikes.  A few ns time a fraction of 1 mA would be on the order of 1 pC of charge pulse, somewhat comparable to the swiches own charge injection.


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