Electronics > Projects, Designs, and Technical Stuff

(Yet Another) DIY Multislope ADC

(1/27) > >>

NNNI:
Hello!
This is my very first post here, and I think I have good reasons to be nervous - I've come back to the EEVBlog forums many times, since a lot of people have posted their multislope ADC designs here, and for some reason I feel mine is a little...simple. And there is also the fact that I don't own a DMM capable of measuring more than 3.5 digits.

With that being said, here is the story behind and the details of my multislope ADC.

I got started on this project because I got jealous of someone getting a Keithley DMM, so I said to myself: "I'm going to make my own!" Of course, I was only this confident because I'd read the Art of Electronics 3rd edition and knew there was something about similar high resolution DMMs. At first I wanted to make a delta-sigma ADC, but after trying to understand the maths behind it, I decided to try something simpler - namely a dual slope. I got as far as a simulation (https://tinyurl.com/ygr27pba) and making a perfboard prototype, but that didn't work so well and I'd moved on to a multislope, which was described in some detail.

I call the topology I came up with "free-running", because as long as a clock signal is present, the multislope keeps running. Here is a link to a simple simulation:  https://tinyurl.com/yes5kj7v

Surprisingly I got the thing to work on a breadboard, but of course, didn't make any measurements then because I knew it was pointless. I got a PCB made and I was able to make some first-order measurements, but was not able to get the residue measuring ADC working, and that had to be abandoned in favour of the second revision of the PCB, this time with much better parts and an LM399 voltage reference. The uC I ended up choosing was the Raspberry Pi Pico, since I got rather enamoured with it and the 500ksps 12-bit (yes, I'm aware of the quirks, I've read Mark Omo's website about it) ADC it has. Of course, there is a separate 3.3V reference for the ADC, I'm not relying on the noisy internal switcher. As for the actual software, a friend of mine is writing the code for me, and he had a brainwave - using the SPI protocol to provide a clock signal to the multislope, and reading the output of the D flip-flop on the falling edge of the clock signal to get the counts for which the negative reference was turned on, and with some maths you can figure out the time the positive reference was turned on and ultimately the input voltage. This approach worked, as seen in a video I made about it (the second half: https://www.youtube.com/watch?v=ucJOKAhCHTQ, and yep, that's my channel) and I hope with some calibration and residue measurement the readings will start to make sense. No way to test beyond 3.5 digits however...

I'm well aware of the limitations of my topology, especially the fact that each switch is turned on an unknown number of times for a given number of clock cycles, for that reason the PCB has a few jumpers to change the switch inputs to PWM, so I can implement some kind of constant switch cycles algorithm.

I have not been able to test the second revision of the PCB yet, since I've had some trouble finding the LT5400-1 resistor network, but I should be getting some soon and I'll post updates then!

In the meanwhile, here is the schematic and a picture of the board.

RoGeorge:
Congrats, the board looks very nice!   :-+

Kleinstein:
If you have trouble getting LT5400:  AFAIK the MORN networks have a compatible pinout, though no thermal pad at the bottom. For the not so high target, this should be well good enough.  The MORN networks may also be available with more resistor values (e.g. 20 K , 50 K).
The resistor R4,5,6,7 are nearly as important for the accuracy.

Just in case you plan the build / polulate another board. The OPA2197 is not the very best choice.  For the reference amplification part I would prefer an OPA2202 (less drift and LF noise).  For the Integrator it is OK though an OPA1642 would be lower noise. There is some advantage to have 2 separate OP for the integrator, so the ouput dirver does not effect the other OP that is setting the precision.

The feedback with the Flipflop makes this a very basic sigma delta ADC.
I may be worth looking at the old solartron DMMs / mark space ADC (e.g. US3918050): when adding a forcing signal one could get a fixed (and lower) switching frequency. The result could still be from the comparator timing directly.

NNNI:

--- Quote from: RoGeorge on August 27, 2021, 07:09:37 am ---Congrats, the board looks very nice!   :-+

--- End quote ---

Thanks, hope it works as well as it looks!

NNNI:

--- Quote from: Kleinstein on August 27, 2021, 07:34:56 am ---If you have trouble getting LT5400:  AFAIK the MORN networks have a compatible pinout, though no thermal pad at the bottom. For the not so high target, this should be well good enough.  The MORN networks may also be available with more resistor values (e.g. 20 K , 50 K).
The resistor R4,5,6,7 are nearly as important for the accuracy.

Just in case you plan the build / polulate another board. The OPA2197 is not the very best choice.  For the reference amplification part I would prefer an OPA2202 (less drift and LF noise).  For the Integrator it is OK though an OPA1642 would be lower noise. There is some advantage to have 2 separate OP for the integrator, so the ouput dirver does not effect the other OP that is setting the precision.

The feedback with the Flipflop makes this a very basic sigma delta ADC.
I may be worth looking at the old solartron DMMs / mark space ADC (e.g. US3918050): when adding a forcing signal one could get a fixed (and lower) switching frequency. The result could still be from the comparator timing directly.

--- End quote ---

Thanks for the suggestions!

I just took a look at the MORN networks and they are indeed cheaper than the LT5400 series, but Vishay does not seem to have them in stock as well. I tried to get some good +/-25ppm resistors for R4 - R7, but they were out of stock, so I think in the next revision I'll end up using more of the MORN/LT5400 resistor networks.

My op-amp choices were dictated by what LCSC had in stock, since I got this board JLC assembled. I'll definitely consider using separate op-amps for the integrators, I can see how having two separate ones will help.

I will definitely take a look at the Solartrons and the mark space ADC.

Thanks once again for the suggestions!

Attached below is the table I made for selecting op-amps, there was another column for slew rate based on which I chose the OPA2197/OPA197.

Navigation

[#] Next page

Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod