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1.5 to 3 MHz frequency doubler circuit
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MasterT:

--- Quote from: Benta on December 27, 2018, 04:30:04 pm ---
--- Quote from: MasterT on December 27, 2018, 04:24:29 pm ---Dispute with what maxim-IC is recommend, I'd use differentiator   RC circuits

http://www.circuit-finder.com/categories/digital/377/frequency-doubler-with-4011

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That circuit won't give you control over the output duty cycle, but rather deliver spikes at double frequency.

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Have you checked a link? There is time/pulse diagrams, duty circle is manageable over R1C1 & R2C2 adjustment. 
ogden:

--- Quote from: Wolfgang on December 28, 2018, 02:58:13 pm ---The jitter free solution is a balanced doubler, like here (you need to scroll down a bit):

https://electronicprojectsforfun.wordpress.com/a-clean-23cm-signal-source/

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OMFG! Everything about your universal signal source device is so... sexy. Many shall learn from you. I admire your attention to tiniest details down to "no improvements left" point.
Gandalf_Sr:
Thanks for the further input guys.  The balanced doubler looks beautiful but it (seems) uses 2 transformers.  Part of the original requirement is that the doubled frequency is aligned with the input frequency; won't the transformers add phase shifts as the signal passes through them?

Also, the roll-your-own approach is problematic, I'd much rather build with off-the-shelf components.

If I can make the PLL device work down to 3.072 MHz it should be fine if I add a comparator or Schmitt trigger on the output but it seems like overkill - I wonder why the TAS5755M is so fussy about the I2S input signal; maybe it needs a register change to affect the way it responds to a bad clock input that becomes OK?

[S. American Cruise Update] At sea today, going round Cape Horn tomorrow, and Ushuaia the day after that - been lucky with great weather so far. Wildlife is amazing: penguins, flamingoes, parrots, owls, and sea lions to name but a few.  Will get close to 60 degrees South at some point.
Wolfgang:
Hi,

if you insist on stock components you can use Mini Circuits transformers instead of the Balun cores. The rest are stock inductors and capacitors.
To phase align the doubled frequency to the fundamental, just divide the digital output by two (74HC74).
Gandalf_Sr:
The need for the doubled frequency comes because the TAS5755M amplifier needs an I2S master clock (MCLK) signal that is not provided by the normal I2S signal lineup which provides a serial clock (SCLK), serial data (SDAT), and L/R or word clock (WCLK).  So there's data that's aligned with the SCLK clock and my requirement is for a MCLK clock that's double the SCLK but also phase aligned with it, I am pretty sure that I can't use a generated SCLK to feed into the BT module to make it use that clock for generating the I2S signals.  Although it's a powerful Amp, the TAS5755M has proved annoying in this respect; the previous design used the same BT module with an Analog Devices SSM3582 Amp that's less powerful but which doesn't need the MCLK clock - the decision to move to the TAS5755M Amp was to get more power output but the MCLK signal and overcoming all its quirks has been a pain in the posterior.
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