Electronics > Projects, Designs, and Technical Stuff

100 MIPs FPGA-based CPU in under 200 lines of Verilog

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jamesbowman:
Small CPU in Verilog, runs Forth at 100 MIPs.

The J1 Forth CPU

All BSD-licensed, comes with a TCP/IP stack, and various fun pieces of demo code including VGA interface and a space invaders game.

J.

mikeselectricstuff:
I thought people had stopped banging on about how great Forth was years ago...!

CryptLordGR:
James change your signature because it is incorrect,

i dont know about FPGAs but i can tell ,even if it runs Forth, that it is very compressed code

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