12V 10A Constant Current Dummy Load Design

[elepo]

Hi everyone.
As many have tried before I am trying to make a constant current dummy load based on Dave's design.
I've read a few threads and blog posts about it and from what I understand here are the things I should take into consideration:

1- MOSFET properties:
Vds and Id: MOSFET should be able to handle the voltage and current that will be put into it
Gate capacitance: It was mentioned in a blog post that lower capacitance is better. I suppose this is because of the oscillations that may occur.
Rds(on): It was mentioned in that blog post that lower Rds is also desirable. I'm not sure why because we aren't working in the saturation region here anyway.
Power dissipation: TO-220 apparently has ~50W maximum power dissipation. This is also confusing to me because a lot of MOSFETs specify more than 100 Watts of power dissipation in their datasheet (IRF540 for example is 120W).

2- MOSFET gate voltage: The op-amp has to be able to provide the necessary Vgs to the MOSFET (considering the voltage drop of the shunt resistor).

3- The shunt resistor has to be able to handle the power dissipation through it.

4- Cooling the MOSFETs

5- This circuit usually oscillates and a capacitor and resistor "compensation network" on the op-amp is needed in order to prevent this. The value of the capacitor and resistor is determined using trial and error and an oscilloscope.

So based on these factors and inspired by this design I came up with the design attached.

1- The MOSFETs will be two IRF540Ns. Each will dissipate around 55W @ 12V10A (given the ~1v drop of the resistors). There is one op-amp connected to each MOSFET to avoid issues with paralleling.
2- The op-amps are two LM358s (because I have a few laying around) and will be powered with 12v/0v so that I won't have to worry about their output voltage being able to turn on the gate. Also I need 12v anyway for the fan.
3- Shunt resistors are 0.22R 10W ceramic ones. 5A will go through each which will give a 1.1v drop and 5.5W dissipation. The 5k trimpot + 47k series resistor goes from 0 to ~1.1v which will match the 1.1v drop of the resistor.
4- I will use an old AMD CPU heatsink+fan. I guess it should be good enough for ~100W.
5- I'm not sure what to do about this one 

Now I have a few questions:

1- Are there any more considerations regarding MOSFET selection?
IRF540N seems to have good specs but I have a few IRFZ44Ns laying around. It's maximum power dissipation is 94W which is less than the 120W of the IRF540N. But if ~50W is the maximum TO-220 can handle then I guess there's no point buying IRF540Ns.
I know they make MOSFETs specifically for linear operation but after a quick search I couldn't find them available where I live also I suppose they must be expensive. TO-247 package is also too expensive for me. I'd rather try with TO-220 first and if they exploded I'll try something tougher.

2- I don't really know why this oscillation occurs and how to get rid of it. As I understand it it's because of the MOSFET gate resistance and inductance of pins and traces. But I always thought these things only happen at high frequencies and I'm not planning to have a switching load just simple constant current load. I assume it has to do with how the op-amp is going to change the gate voltage. I'd be grateful if someone could explain it to me or point me to a document/post where it is explained so that I can get a better understanding of why and how this oscillation occurs.
Other than that, as I understand it people get rid of this oscillation by checking it with an oscilloscope and trial-error with different capacitor and resistor values. I don't have an oscilloscope. Will I be able to pull this off without one?

[mawyatt]

If one isn't interested in optimal performance C1 can be anything from 0.01uF to 0.1uF and usually produces a highly over damped performance. R2 isn't necessary and you might reduce R3 from 1K to 400~500 ohms to reduce the lag driving the NMOS gate (Miller Effect).

If a more optimal performance is required then a proper loop-analysis followed by a simulation is in order, but since you are using an LM358 and the +12V supply as the "Reference", assume this isn't required for your application.

Best,

[magic]

R2 is necessary, but it should go on the horizontal segment between C1 and R4.
U1 seems to be doing nothing useful. U2 inputs are high impedance, the adjustment pot could be connected to them directly.

Rds(on) would become important in a low voltage, high current load.

The power dissipation spec on the front page applies if the metal side of the FET is cooled to 25°C by the heatsink - a little unrealistic. The 50% reduction applies if its temperature is halfway from 25°C to the maximum die temperature of 150°C or whatever, which may be achievable with a good CPU heatsink. At other temperatures power scales proportionally. Higher power rating is better than lower rating, TO247 usually has better ratings than TO220.

Watch out for Safe Operating Area. It specifies how much drain current and drain voltage can be applied at the same time, which is exactly what matters in linear operation. Ideally there would be a DC curve there, but switching FETs usually are not rated at DC, only for pulsed linear operation, so you are on your own. If you see a switching FET where those curves aren't straight, but decrease sharply at high voltage, run away from it. Many new ultra low Rds(on) FETs for low voltages are like that. IRF540 are older FETs that may have a chance in linear, who knows.

[elepo]

If one isn't interested in optimal performance C1 can be anything from 0.01uF to 0.1uF and usually produces a highly over damped performance. R2 isn't necessary and you might reduce R3 from 1K to 400~500 ohms to reduce the lag driving the NMOS gate (Miller Effect).

If a more optimal performance is required then a proper loop-analysis followed by a simulation is in order, but since you are using an LM358 and the +12V supply as the "Reference", assume this isn't required for your application.

Best,

What performance are we talking about here? Is it the speed at which the amplifier adjusts the gate voltage?
What happens if this performance is low? (Note that I don't intend to do any switching).

[MarkF]

You're not going to get 10A from a single MOSFET mostly due to heat dissipation. You would probably want to use at least three MOSFETs. Other load projects you may find of interest:

   https://www.eevblog.com/forum/projects/constant-current-dummy-load-ran-a-gutter/msg3180226/#msg3180226

   https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/

   https://www.eevblog.com/forum/projects/current-sink-sudden-mosfet-death/msg4013902/#msg4013902

[mawyatt]

Since you aren't indicating using a pulsed current by using a pot as the current set-point, a slow response won't matter.

Also as indicated above don't use R2 as indicated in the schematic, it does nothing as shown. Move the C1 bottom contact to the negative op-amp input, then a series resistance to the shunt current sense resistance does something. By increasing the resistance "seen" by C1, this helps in establishing the dominate integrating time constant by brute force bypassing the more complex feedback loop formed by the output device.

Best,

Edit: Another improvement you might consider adding a 1.25V shunt reference across the pot, and reduce the supply resistor to provide the proper reference and pot current. This removes the output current dependance on the +12V supply.

[elepo]

Thanks everyone. It's getting pretty late here so I have to reply to your posts tomorrow. Just leaving this here so you won't think I'm ignoring other posts since I answered to one. I was reading about safe operating area in the meantime.

[magic]

There is little useful information in SOA plots of switching FETs.

If you see straight lines like in IRF540, the limits are purely thermal, calculated on the basis of how much energy the FET can absorb starting with 25°C temperature before it hits 150°C. There is usually no DC curve, so none of it really matters to a dummy load.

The important thing is to avoid curves which dive down like below. This is a fairly expensive TO247 MOSFET rated 500W, but it completely falls apart above 10V in linear operation. Surprisingly, they even show the DC curve, but you would be nuts to use this part as a dummy load.

[SmokedComponent]

I successfully used a couple of IRFP250 in my load. No smoke. SOA is significantly better than that of IRF540.
They are also used in some commercial loads and are inexpensive. Give those a try.

[magic]

I successfully used a couple of IRFP250 in my load. No smoke.

What sort of voltage and current per FET?

SOA is significantly better than that of IRF540.

That's because of higher power rating / lower thermal resistance.

SOA plots of old IRFxxx parts are very simple. I will use IRFP240 as an example.
Look up transient thermal impedance at 10ms pulse, it's 0.4°C/W. So you can dissipate ~300W starting at 25°C for 10ms before it hits 150°C.
Now look at the 10ms curve on SOA: 30A at 10V, 10A at 30V, 3A at 100V. Coincidence? You decide

[elepo]

R2 is necessary, but it should go on the horizontal segment between C1 and R4.

Actually I was unsure about its placement because I've seen both kinds of placements:
http://www.kerrywong.com/blog/wp-content/uploads/2013/03/ccdummyload.png
http://www.kerrywong.com/blog/wp-content/uploads/2013/10/ElectronicLoad.png
The second one was an improved version so I assumed it must be the better placement.
I'll change it tho since others have also mentioned this.

U1 seems to be doing nothing useful. U2 inputs are high impedance, the adjustment pot could be connected to them directly.

I was unsure about this too but this is what this post does, and it's also done in Dave's original video.
I really don't understand the purpose of it since this is the same op-amp what difference can it make connecting the pot to one input or the other?

Rds(on) would become important in a low voltage, high current load.

I see...

Watch out for Safe Operating Area. It specifies how much drain current and drain voltage can be applied at the same time, which is exactly what matters in linear operation. Ideally there would be a DC curve there, but switching FETs usually are not rated at DC, only for pulsed linear operation, so you are on your own. If you see a switching FET where those curves aren't straight, but decrease sharply at high voltage, run away from it. Many new ultra low Rds(on) FETs for low voltages are like that. IRF540 are older FETs that may have a chance in linear, who knows.

Hmmm regarding SOA IRF540 seems to have more than double the current capability of IRFZ44 @12v. Z44 looks like a no-no for even 5A.

[elepo]

SOA plots of old IRFxxx parts are very simple. I will use IRFP240 as an example.
Look up transient thermal impedance at 10ms pulse, it's 0.4°C/W. So you can dissipate ~300W starting at 25°C for 10ms before it hits 150°C.
Now look at the 10ms curve on SOA: 30A at 10V, 10A at 30V, 3A at 100V. Coincidence? You decide

Is there something other than thermal limitations that SOA should provide?
Section 3.1 of this application note explains the SOA and as I understand it it's all about temperature and thermal runaway. Since we are using DC the transient thermal impedance will be equal to the thermal resistance of the MOSFET, and since we have an op-amp monitoring the current we should not be worried about thermal-runaway. So why is the SOA even important?

[elepo]

Also as indicated above don't use R2 as indicated in the schematic, it does nothing as shown. Move the C1 bottom contact to the negative op-amp input, then a series resistance to the shunt current sense resistance does something. By increasing the resistance "seen" by C1, this helps in establishing the dominate integrating time constant by brute force bypassing the more complex feedback loop formed by the output device.

I will do this.

Edit: Another improvement you might consider adding a 1.25V shunt reference across the pot, and reduce the supply resistor to provide the proper reference and pot current. This removes the output current dependance on the +12V supply.

I didn't quite understand that. Is it a bad thing that the pot resistors are drawing a bit of current?

[elepo]

You're not going to get 10A from a single MOSFET mostly due to heat dissipation. You would probably want to use at least three MOSFETs. Other load projects you may find of interest:

   https://www.eevblog.com/forum/projects/constant-current-dummy-load-ran-a-gutter/msg3180226/#msg3180226

   https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/

   https://www.eevblog.com/forum/projects/current-sink-sudden-mosfet-death/msg4013902/#msg4013902

It's two MOSFETs so 5A each but I'm beginning to think even that might be too much as it seems the MOSFETs will be working at their maximum ratings. Might switch to 3 TO-220 or two TO-247.
(To be honest I'll probably try with two TO-220 and after exploding them move on to 3  )

I've read those threads, specially the first one. I'm gonna review them before finalizing the circuit as there's a lot of useful information there.

[Kleinstein]

A problem with MOSFETs is the thermal run-away and developement of hot spots inside the FET. Internally the MOSFETs look like many small MOSFETs in parallel. With rising temperature the current has the tendency to concentgrate on the aleardy hot areas. With higher voltage this can lead to thermal run-away inside the chip.  So the SOA limits applies also for just a single FET used.

The sharp bend down in the SOA curve is where the thermal instablity starts. The actual performance can vary - some are better and some can be worse with bubles in the dies attachment.

A nasty point is that not all SOA curves are reliable. Some are just calculated from thermal impedance measurements in pulsed tests and do no include the thermal instablitiy. So if the SOA curve does not show the bend down above some voltage, this could be just a fautly SOA curve. One should at least be suspicous in this case.  I would prefer a SOA curve that shows the onset of thermal isntability, but at a relatively high voltage so that it does not interfere with the planed operation.

The IRFP240/250 are old parts that where relatively populator in MOSFET based audio amplifiers. The old ones seem to have a good SOA. However today one usually gets IRFP250N and this is a newer version with likely smaller die.  They still seem to be reasonable, but still expect them not to be as sturdy as the old ones.

To reduce the chance for the thermal instability, it can help to look at FETs for considerably higher voltage - so more like 600 V types, even for just 20 V use.

The thermal specs for MOSFETs look not realistic in many cases. In real life the thermal contact is far from perfect and one should not use too much power from a small TO220 case.

[MegaVolt]

Aliexpress предлагает базовые модули. Транзисторы + радиатор + операционный усилитель.

https://aliexpress.ru/item/1005002763384225.html

[mawyatt]

Short NASA report on MOSFET Thermal Instability.

https://www.nasa.gov/sites/default/files/files/NESC-TB-10-01_Power_MOSFET_Thermal_Instability-1-28-10_NRB_TECH_BULLETIN_FINAL.pdf

Best,

[mawyatt]

Edit: Another improvement you might consider adding a 1.25V shunt reference across the pot, and reduce the supply resistor to provide the proper reference and pot current. This removes the output current dependance on the +12V supply.

I didn't quite understand that. Is it a bad thing that the pot resistors are drawing a bit of current?

Add a shunt 1.25V reference like the TS4061 across the pot top and bottom terminals, keep the wiper as shown. Change the +12V resistor R1 to supply ~1ma to the TS4061 reference, or ~ 8.2K, and maybe add a decoupling cap across the reference & pot (anything like 0.1uF to 10uF). This now supplies the control voltage from the reference and not the +12V supply.

Best,

[Kleinstein]

Aliexpress предлагает базовые модули. Транзисторы + радиатор + операционный усилитель.

https://aliexpress.ru/item/1005002763384225.html

For linear operation the exact MOSFET type can matter. So getting parts from a source like Aliexpress is mainly something for the very desparate ones, who can't get them from a good source. If it has to be from china, I would go for part advertised as reclaimed older parts, to reduce the chance of getting fakes.

With MOSFETs selected for gate voltage, one could also use a lower threshold one with additional drain resistor in parallel. So some of the power would be moved to the resistor instead of the MOSFETs. Getting good resistors may be easier.

[mawyatt]

Actually that AliExpress is so cheap it might be worthwhile getting one to experiment with, you could easily replace the unknown MOSFETs with known devices from Mouser or DigiKey.

Another option is the cheap DL-24

https://www.eevblog.com/forum/testgear/cheezeball-dc-load-dl24p-pump-or-dump/

Either case might work for the OP, and maybe easier in the long run, even having to diddle around replacing MOSFETs, than trying to "roll your own".

BTW if any of these cheap AliExpress items use Dominate Pole Compensation, then the MOSFET will likely have little effect other than how much current/power/voltage they can handle, and how much gate drive voltage is necessary. This is one of the benefits of DPC in that it effectively bypasses the control pass device complex frequency dependancies, thus somewhat immune to the pass device characteristics, but of course the downside is its really slow!!

Best,