EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: phenol on April 06, 2015, 08:37:21 pm
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Hi
I needed a 1GHz clock source for the AD9910 eval board as I didn't feel like using the on-board 25MHz xtal+pll multiplier.
I used a 100MHz OCXO feeding an AHC nand gate (used as a squarer), which in turn feeds a 515MHz (tuned down to 500MHz) toko helical filter, followed by a GALI74 amp. The amplified 500MHz signal is fed to a schottky doubler, a 1GHz helical filter and finally another GALI74. It puts out 10.5dBm at 1gig and that's with attenuation pads between stages... I couldn't be bothered with actually making a proper pcb, so i just used double sided copper clad and cut the islands with a sharp blade.
While it seems to work fine, i'd like to gain some inspiration from other designs of PLL-free multipliers
cheers
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At that kind of speed, a wire is no longer a wire and you would need fairly specialized skills to do any design work.
I think a non-PLL precision oscillator is unlikely to exist at that kind of grequencies.
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While you can use traditional techniques of discrete multipliers and filters to do this, these days the integrated PLL+VCO route is almost always the way, as there are fewer parts in a much smaller area, and there's nothing to tweak, which in a production scenario makes a lot of sense.
The mutipliers used to be a series of transistor (or mmic) gain stages followed by an LC tank usually tuned to extract the second or third harmonic at each stage.
Any reason you don't feel like the integrated PLL+VCO method?
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maybe VCO/PLL gives OP the "jitters".
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if you want to go completely analogue, have a look at the TEK 284 (http://bama.edebris.com/download/tek/284/Tek%20284_v6.pdf) pulse gen, it has a 1 GHz sine wave gen with a 2N3478 RF transistor (http://w140.com/tekwiki/wiki/2N3478)
I used an ADF4351 to generate a 3.5 GHz clock (for the AD9914), it's quite good, but I guess there's a limit to what kind of phase noise you can expect.
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Hi
I needed a 1GHz clock source for the AD9910 eval board as I didn't feel like using the on-board 25MHz xtal+pll multiplier.
I used a 100MHz OCXO feeding an AHC nand gate (used as a squarer), which in turn feeds a 515MHz (tuned down to 500MHz) toko helical filter, followed by a GALI74 amp. The amplified 500MHz signal is fed to a schottky doubler, a 1GHz helical filter and finally another GALI74. It puts out 10.5dBm at 1gig and that's with attenuation pads between stages... I couldn't be bothered with actually making a proper pcb, so i just used double sided copper clad and cut the islands with a sharp blade.
While it seems to work fine, i'd like to gain some inspiration from other designs of PLL-free multipliers
cheers
PLL should do a good job. I was looking at a few oscillators several years ago in the GHz + range. One was quartz to comb to SAW to buffer. Another was quartz to comb to LC to buffer.
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I preferred the xtal multiplier route because of phase noise. What I'm interested in are efficient comb generation techniques . Cheap single AHC/LVC gates seem to do the job reasonably well way above 500MHz.
Snap diodes is another option, but those are unobtanium. I read an Avago app note where they use some inexpensive pin diodes in passive x3/x5 arrangement. I have yet to see which configuration works better-the basic cmos squarer or the pin diode x5
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Contact the folks at Aeroflex:
http://ams.aeroflex.com/metelics/micro-metelics-prods-SRDs-chips.cfm (http://ams.aeroflex.com/metelics/micro-metelics-prods-SRDs-chips.cfm)
Snap diodes are still used in comb generators and frequency multipliers today.
Here is a 1964 hp Journal article about snap diodes and frequency multipliers. App notes alone will not yield good results. To design and used these diodes properly requires knowledge of microwave design, practices and construction techniques.
http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1964-12.pdf (http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1964-12.pdf)
EH Research made pulse generators using snap diodes back in the 1960's. These had sub nanosecond rise time with volts of peak to peak output into 50 ohms.
Bernice
Snap diodes is another option, but those are unobtanium.
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I'm confused, did you ask for an oscillator source for the AD9910 or comb generator?
there's also 1 GHz oscillators on digikey (http://www.digikey.fi/product-search/en?FV=fff4000d%2Cfff8016e%2C22c03c7&mnonly=0&newproducts=0&ColumnSort=0&page=1&stock=1&quantity=0&ptm=0&fid=0&pageSize=500)
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FWIW with the AD9912 DDS we used an ADF4350 eval-board (PLL+VCO in one chip) and the DDS-output does look better with an external 1 GHz clock compared to the internal PLL+VCO on the DDS itself.
Let us know if you do a comparison between DDS output with an ADF4350 PLL+VCO like clock-source and a PLL-free multiplier!
AW
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Like I said, i have a 100-MHz OCXO and i wanted to multiply its output to 1GHz. The 1Ghz oscillators on digikey may be a viable option, but they lack the stability of the ocxo. There seems to be a thermally compensated option there, but its eur70 price tag is prohibitive.
I am not going to mass-produce any of those things, so the added complexity is not an issue. Low phase noise is all need.
As for snap diodes, i came across this document:
http://cp.literature.agilent.com/litweb/pdf/5966-4998E.pdf (http://cp.literature.agilent.com/litweb/pdf/5966-4998E.pdf)
They use the widely available HSMP3822 pin diodes as odd order multipliers.
I may attempt to duplicate their x5 multiplier instead of using SN74AHC1G00. It has some schmitt trigger action on its inputs and I am not sure if and how that would affect its residual phase noise.
As far as PLL sources go, i am not going to use one.
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but its eur70 price tag is prohibitive.
fair enough :) from what I can see the phase noise of those things is not uber good either (-91 dBc at 1 kHz)
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well, they are probably pll-based.
but its eur70 price tag is prohibitive.
fair enough :) from what I can see the phase noise of those things is not uber good either (-91 dBc at 1 kHz)
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As a matter of interest, what are your phase noise/jitter requirements?
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If your looking for an alternative multiplier structure, take a look at W1GHZ PCB multipliers..
The LO Board for the 1296 transverter runs at 1152 (I'm building a pair now...)
http://www.w1ghz.org/small_proj/small_proj.htm (http://www.w1ghz.org/small_proj/small_proj.htm)
Otherwise you could use the sapphire oscillator in a microwave "brick" and one of the many phaselocking schemes used for ham radio microwave.
The driver stage in the brick usually runs around 900 Mhz to 1 Ghz....
http://www.ke5fx.com/brick/brick.htm (http://www.ke5fx.com/brick/brick.htm)
Steve
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As a matter of interest, what are your phase noise/jitter requirements?
better than -135dBc/Hz at 1k offset and 100MHz
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Thanks for the links.
w1ghz has an interesting doubler design built around a dedicated MCL doubler brick. I was looking into such an option, but I finally did it with a dual schottky diode and a small balun at a tiny fraction of the price of that doubler. The helical filter immediately after the doubler does a good job rejecting the out of band garbage, especially the 500MHz fundamental.
If your looking for an alternative multiplier structure, take a look at W1GHZ PCB multipliers..
The LO Board for the 1296 transverter runs at 1152 (I'm building a pair now...)
http://www.w1ghz.org/small_proj/small_proj.htm (http://www.w1ghz.org/small_proj/small_proj.htm)
Otherwise you could use the sapphire oscillator in a microwave "brick" and one of the many phaselocking schemes used for ham radio microwave.
The driver stage in the brick usually runs around 900 Mhz to 1 Ghz....
http://www.ke5fx.com/brick/brick.htm (http://www.ke5fx.com/brick/brick.htm)
Steve
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the topic is rather old, but I'm going to keep it active for the time being, as I found some cheap step recovery diodes (Macom) with which I'm planning to build another x10 multiplier, but this time a single stage. The one i have now is x5x2 with interstage helical filters. direct x10 means that I'd have to use more selective filtering at the output, probably copper tubing coax cavity filter. Let's see what happens...
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There are some narrow band low noise VCOs for 1GHz sources, for example Crystek CVCO55CX-1000-1000 or CVCSO-914-1000. You can build a synthesizer with a low noise integer PLL from Analog and phase noise at 1GHz could be very low if you design the loop filter correctly.
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Those look promising, eliminating the need for bulky filters,but.... they're worth their weight in gold.
I've been looking for SAW alternatives to 1GHz cavity or helical filters without any success.
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ma144769-287T, got it from Mouser.
I guess alternative HP or USSR (2D524A,2D528A...) parts can still be found here and there. I do also have the PIN diode mentioned in that Agilent app note, but I haven't done anything with it yet.
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I needed a Ghz source to set the master oscillator on a Spectrum Analyzer. My approach is to use the harmonic of a 100Mhz oven controlled oscillator filtered with a cavity filter I already have and then amplified.
I was also thinking of just using the harmonics of my GPSDO, filtering and amplifying as well.
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I would still love to see some photos of your dead bug prototype 1GHz source. Don't worry if it looks messy.
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it's not exactly dead bug style, i carved the islands with a knife, drilled many holes and did via stitching, literally, with thin silvered wire. In addition to vias, there is also copper tape running around the perimeter of the board connecting top and bottom ground.
The helical filters are on the opposite side. The single shield plate is there to keep the amplified 500-MHz signal from coupling onto the input of the final amplifier. Ideally, each stage should be confined into its own shielded compartment.
The doubler xfrm uses a binocular ferrite and only a single loop of braided copper wire (3 interwoven enameled wires). I am not sure how symmetric this arrangement really is and how well it suppresses the fundamental. There are small attenuation pads here and there for better matching (helical filter response) and amplifier stability.
Because I only found 515MHz triple helical filters, I had to tweak them down somewhat using the tracking gen of the specan.
I would still love to see some photos of your dead bug prototype 1GHz source. Don't worry if it looks messy.
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Beauty is in the eye of the beholder!
Thanks for the description and annotationed photo.
How well does it perform compared to the earlier specs?
Nice job.
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Thanks
I'm not sure how well it performs in terms of phase noise contribution. In terms of spurs, there's a prominent 2GHz one generated by the mmic itself.
If SRD works (and it should), I could get away with just one amplification stage after a sharp bandpass filter.
Minicircuits now have some very low noise (<1db) highly linear gain blocks.
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That is built in to quite a neat small footprint there.
Phase noise is the most important part when running a DAC chip. The harmonics probably don't matter at all since its treated as a digital signal. You might be able to see the phase noise with your spectrum analyzer if it is high enough spec.
Would be interesting to see how your contraption compares to the internal PLL on that chip.
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well, for really low phase noise I shouldn't use a SRD at all, as it seems to inject shot and recombination noise. NLTL have superior performance.
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Maybe this one? :
http://uk.farnell.com/texas-instruments/lmk61e2-siat/oscillator-prog-1ghz-3-465v-smd/dp/2520002 (http://uk.farnell.com/texas-instruments/lmk61e2-siat/oscillator-prog-1ghz-3-465v-smd/dp/2520002)
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with its tolerance of 50ppm it just doesn't cut the mustard in terms of stability. Plus, the datasheet has phase noise plots up to ~160MHz or so. 1GHz purity is likely going to be worse. Other than this and the potential spur injection in fract-N mode, I don't see a reason why it shouldn't work.
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PLL (x40) and on-board 25MHz xtal vs ocxo+x10 multiplier (1GHz) in 50k, 1000k and 10000k spans using the FFT function of the scope. CF=145.45MHz. A lot of the spurs are internal to the scope, but the difference between PLL and external clock is obvious, i believe.
I did not spend any time tweaking the PLL loop filter components. Loop BW is around 50kHz with phase margin of 65 degrees according to the PLL loop filter excel spreadsheet developed by Analog.
the internal VCOs' phase noise is very sensitive to power supply noise, esp on dac and clock supply lines...open loop gain in the last band is 850MHz/V!
That is built in to quite a neat small footprint there.
Phase noise is the most important part when running a DAC chip. The harmonics probably don't matter at all since its treated as a digital signal. You might be able to see the phase noise with your spectrum analyzer if it is high enough spec.
Would be interesting to see how your contraption compares to the internal PLL on that chip.
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Now that is a difference as clear as night and day. Great work! :-+
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I gave the srd mentioned earlier a go and while it is possible to get remarkably good conversion efficiency (17-18dbm 100MHz in->5-7dbm 1GHz out), i found it to be particularly fussy with output loading and harmonics reflections back onto itself. It would burst into what looks like parametric oscillations and generate all sorts of products like subharmonics (50M apart) and what not.
I then figured i should ask Macom how much their NLTL (MLPNC-7100S1-SMT580) cost and the nearly $3000 a pop made me pursue a different route-- schottky multipliers (x5+x2) with low 1/f noise parts (HSMS2815).
Would this be more efficient or cheaper than the current arrangement? Probably not, but im willing to give it a try
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NLTL can be used as a very low phase noise comb generator, 10-15 db better than a SRD, probably close to the 20logN theoretical limit.
In terms of conversion and cost efficiency among passive circuits #1 would be srd, followed maybe by varactor multipliers, schottky and last is NLTL. The $2900 i was quoted really sounds absurd. Either it's a slow moving part and they have to produce it from a scratch or the small ceramic package is a host of a sizable diamond to justify the hefty price tag...
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It's unlikely you'll be able to observe the difference between an SRD multiplier and an NLTL without going to a lot of trouble and/or expense. The NLTLs have some nasty parametric instabilities of their own; if anything, I've found SRDs to be easier to work with.
Cheap MMIC amps make good comb generators if you overdrive them through small coupling capacitors. (http://www.ke5fx.com/cg.htm)
For a 1 GHz clock source it's almost crazy not to build a PLL with one of those Crystek SAW oscillators. They're really nice parts.
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I've seen those Crystek parts before, but still, complexity- and price-wise I believe that a passive multiplier with intermediate gain/filter stages is better. When i say complexity, i really mean the PLL+CPU burden around the SAW oscillator. Other than that, it would definitely yield a compact design.
As for SRD, what would be the optimum output loading/matching for stable operation? It only seems to run stable with some sort of resistive elements/attenuator pads, which does of course degrade conversion loss.
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I've seen those Crystek parts before, but still, complexity- and price-wise I believe that a passive multiplier with intermediate gain/filter stages is better. When i say complexity, i really mean the PLL+CPU burden around the SAW oscillator. Other than that, it would definitely yield a compact design.
As for SRD, what would be the optimum output loading/matching for stable operation? It only seems to run stable with some sort of resistive elements/attenuator pads, which does of course degrade conversion loss.
You can make an SRD multiplier favor a particular harmonic with a reflective bandpass filter that bounces the unwanted comb lines back towards the diode. But unless you're really feeling adventurous, I would use a 3 dB attenuator instead (which will provide at least 6 dB of return loss from the diode's point of view.)
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Well, that's more or less what i ended up doing. The filter i used for experiments is a simple 2-stage helical unit with 50-ohm tap points. Connecting the low-z input of the filter directly to the SRD or even 3 SRD's in parallel to get the impedance down, was disastrous.
Some designs would use a lambda/4 line between the filter and the diode and lightly couple the other end of the line to the high-z end of a sharp cavity filter.
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The following screenshot is the output of a x5 HSMS-2815 diode multiplier (~100MHz in/500MHz out) based on this topology: http://www.techlib.com/files/RFDesign2.pdf. (http://www.techlib.com/files/RFDesign2.pdf.) Conversion loss is ~19.5dB. Even order harmonics are somewhat suppressed. x3 output is rather too strong, so further bandpass filtering is needed.
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This is a sketch of the rev.2 x10 low noise 100MHz in->1GHz out multiplier. I don't have a clue how low a noise it actually is.
OCXO delivers ~20.5dBm into 50ohms. The input attenuator brings that down to 15dBm and improves input return loss. What follows is the Wenzel-style odd order x5 schottky multiplier based on low 1/f noise diodes. The 500MHz bandpass filter is a canned Minicircuits component. That and the coaxial ceramic resonator 1GHz bandpass filter (Minicircuits) are pretty darn expensive, yet easy to use, blocks. Cheaper helical filters should work, too.
The 500MHz->1000MHz doubler is again HSMS-2815 and a tiny Coilcraft transformer. I tried out the AMK-2-13 doubler, but, while it may have superior harmonic and fundamental rejection, its conversion loss was some 2dB worse than my version.
Interstage amplifiers are PGA-103.
The knife-carved pcb prototype puts out ~13dBm @ 1GHz with the second harmonic at -50dBc.
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This is a sketch of the rev.2 x10 low noise 100MHz in->1GHz out multiplier. I don't have a clue how low a noise it actually is.
OCXO delivers ~20.5dBm into 50ohms. The input attenuator brings that down to 15dBm and improves input return loss. What follows is the Wenzel-style odd order x5 schottky multiplier based on low 1/f noise diodes. The 500MHz bandpass filter is a canned Minicircuits component. That and the coaxial ceramic resonator 1GHz bandpass filter (Minicircuits) are pretty darn expensive, yet easy to use, blocks. Cheaper helical filters should work, too.
The 500MHz->1000MHz doubler is again HSMS-2815 and a tiny Coilcraft transformer. I tried out the AMK-2-13 doubler, but, while it may have superior harmonic and fundamental rejection, its conversion loss was some 2dB worse than my version.
Interstage amplifiers are PGA-103.
The knife-carved pcb prototype puts out ~13dBm @ 1GHz with the second harmonic at -50dBc.
That should be pretty quiet. Remember that anything better than about -155 dBc/Hz is wasted if you're driving a DAC, ADC, or DDS, due to its white noise floor. You'll need a -175 dBc/Hz-class OCXO to get down there.
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As far as AD9910 goes, someone had noticed that its dac bandgap reference is not bypassed/filtered resulting in excessive AM noise.