The analog inputs are pressure/temperature and need to be digitized at the highest resolution possible
There are no ADCs that I know of that have a linearity specification better than +/- 0.5ppm typ, 2ppm max (LTC2737/7/8-20 - very expensive, around $30) which limits accuracy to 19 bits at best.
If the measurement accuracy is relative to the voltage reference (rather than ratiometric) you'll be doing very well to get below a few 10's of ppm error without an expensive reference and expensive periodic calibrations.
16ppm equates to 16 bit accuracy, so do you really need a 24 bit ADC? Resolution >> accuracy can still be useful of course so here are a few AD parts to consider - I don't have the time to find the data for TI/Maxim etc parts. The noise performance is normalized to 40SPS fully settled to allow 4 x 10SPS channels:
| Device | Cost (1K) | Noise free bits @ 40SPS (fully settled) | Max INL (ppm) |
| AD7797 | $3.49 | 19.5 4 |
| AD7124-4 | $4.44 | 19.5 4 |
| AD7768-1 | $5.95 | 20.8 (est) 7 |
| AD7172-2 | $6.93 | 21.8 5 |
| AD7176-2 | $9.25 | 22.15(est) 7 |
| AD7175-2 | $11.85 | 23.5(est) 3.5 |
| AD7177-2 | $14.65 | 23.5(est) 3.5 |
| ADS1217 | $10.25 | 22.5(est) 12 |
To achieve the datasheet peformance requires a very low noise, high linearity differential buffer amplifier + filter that can suppress the kickback charge from the ADC's input sampling capacitance. (Note that the above table values are for the ADC's input buffer disabled, where available, to get the best INL). The drivers can easily equal or exceed the ADC cost in multi-channel configurations.
You could use 4 x SE to differential convertors (if required) + 4 x buffer amplifiers + 4 x ADC R/C input filters feeding a 4x2 multiplexor to the ADC (some ADCS include the multiplexor). The drivers (buffers) can use slow, precision amplifiers by using a large capacitor in the filter to suppress the kickback.
Alternatively a 4 to 1 multiplexor can mux the sensor inputs into a single SE -> diff, buffer + filter stage at lower cost. But in this case the filter has to settle to > 20+ bits in between each conversion. (Eg. if 5ms settling time is allowed then the ADC conversions have to be at 50SPS with slightly worse noise performance than in the table above). The filter capacitor has to be much smaller and the driver amp has to be much faster to suppress the kickback. The amp will be more expensive but only one is required. An AD4896/7 is one good option being low noise, including at low frequencies, and very fast, but it may be an overkill.
The SE -> diff and buffer amp will also add linearity errors so havng the multiplexor last also allows a better amp to be used without escalating overall cost too much.
Another big advantage of having only one driver is that there can't be any gain differences between channels so calibration is simplified.
[EDIT] Added ADS1217 to table.
Also note that the noise performance in the datasheets is for 0V input. For non-zero inputs the voltage reference noise has to be added in proportion to the signal level (as a fraction of the full scale input) which may be significant compared to the ADC noise. For example an LM399 may have 4uVpp 0.1-10Hz noise or approx .6ppm (plus a bit more for the 40SPS rate used in this application). 0.6ppm is approx 20.6 bits which is rather more than most of the listed ADCs' intrinsic noise. Cheaper band gap references can be even noisier.
Also note that ADC zero offset and gain drift with time and temperature will add additional errors, unless auto zero and/or gain calibration capability are provided, which may affect ADC choice.