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4 channel ADC, 10 MHz, 8 bit design
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splin:
I have a few issues ith your cct. First, the input stage needs rethinking. Problem is that you want a few MHz BW, but that 9Meg resistor along with say 3pF of input/stray capacitance of the opamp will act as an approx 6kHz LPF. Stray capacitance will also dramatically alter the divider ratio at high frequencies. Eg. if each resistor has only 1pF of parasitic parallel capacitance, the divider ratio is down from 10:1 to 5:1 by 37kHz.

If you don't want to reduce the input impedance by using much lower resistor values, then you have a few choices:

1) Use much lower value resistors in the divider, but this lowers the input impedance correspondingly.

2) Parallel each resistor in the divider with capacitors to swamp the parasitics, with values in the same ratio as the resistors (as seen in oscilloscope input ccts). One of the capacitors will need to be trimmable as they will drift with temperature and time relative to each other and the resistors. Alternatively, as your accuracy requirements are modest, you could probably use low tempco capacitors (NPO) and select-on-test one of the capacitors.

3) Buffer the input with an opamp or transistor(s) followed by a low impedance divider. This would require supply voltages greater than the +/- 10V input signal which would be a pain.

Apart from the input buffer I think you've considerably over complicated the design given you only need 5 or 6 bits of precision:

4) You don't need a seperate reference - the 5V supply voltage should be more than adequate - a percent or two change of reference voltage won't be a problem. The high and low reference buffers aren't required - connect the reference high, VRT to 5V and low, VRB to 0V. You want the highest possible reference voltage (Vdd) to a) maximize the signal to noise ratio (not too important in this case) and b) to minimize the reduction ratio of the input divider which now only has to be 4:1.

5) You don't need a -5V supply; level shift the +/-10V input to the 0 to 5V input range of the ADC. If you don't mind a lower input resistance, you can get rid of the input buffer and use the ADC driver to do the level shifting (and attenuation in an inverting configuration) - see attached. The 200k ohm input resistance gives 1.9MHz BW according to the simulation but this is going to be dominated by parasitic capacitances around the input divider and opamp +Ve input. The R3/C2 filter values aren't designed - just a guess.

The ADA4891 is a high speed driver which is a lot cheaper than the LMH6702 and will be (way) more than adequate for your requirements. Slower, cheaper amps (OPA358?) are likely to be suitable given that you are only sampling at 10MSPS (rather than 20MSPS as assumed in the datasheet) and only need 5 or 6 bits.

Input protection is another issue. Even though you know what you are doing it would be a shame to accidentally damage it for the sake of a few diodes/transils etc.
FrankBuss:
Thanks, looks good with just the ADA4891. I added two protection diodes as well, couldn't find a way to use the diode symbol, but works with an auto generated symbol. Attached is a LTSpice simulation circuit diagram. And I added another opamp to create the shift voltage. But might be better to connect R7 to a LM4040 with 4.1 V and not +5V.

Instead of connecting VRT to 5V, and VRB to 0V, I would use the suggestion in the datasheet to connect it to VRTS and VRBS for self biasing. VRTS is 2.6 V typical and VRBS 0.6 V typical. I guess there is a reason that not 0 V is used as the default lower limit? The datasheet wasn't clear for me, but I guess the converter doesn't work as linear near VDD and GND? Noise wouldn't be a problem for my application, but would be nice if I didn't have to re-calibrate it, if VDD changes a bit. I could use pots in series to R7 and R5 to adjust the center and scale it to exactly +/-10V for full scale.

I think the input impedance of 150k is no problem for my application to sample the signals of a programmer. If I want to sample some sensitive analog circuits, I can always use an external pre-amplifier.
FrankBuss:
New version is attached. It is getting really small.
splin:

--- Quote from: FrankBuss on November 28, 2018, 01:50:20 pm ---Thanks, looks good with just the ADA4891. I added two protection diodes as well, couldn't find a way to use the diode symbol, but works with an auto generated symbol. Attached is a LTSpice simulation circuit diagram. And I added another opamp to create the shift voltage. But might be better to connect R7 to a LM4040 with 4.1 V and not +5V.

Instead of connecting VRT to 5V, and VRB to 0V, I would use the suggestion in the datasheet to connect it to VRTS and VRBS for self biasing. VRTS is 2.6 V typical and VRBS 0.6 V typical. I guess there is a reason that not 0 V is used as the default lower limit? The datasheet wasn't clear for me, but I guess the converter doesn't work as linear near VDD and GND?
--- End quote ---

The suggested self-biasing scheme is probably provided for convenience when driving it with a non rail to rail amp. There is nothing in the datasheet to suggest that this is better than using Vdd, 0V for the reference - in fact it says:


--- Quote ---The reference self-bias circuit of Figure 19 is very simple and performance is adequate for many applications. Superior performance can generally be achieved by driving the reference pins with a low impedance source.
--- End quote ---

You would be hard pressed to get lower impedance than Vdd and Vss. Of course, if Vdd is particularly noisy you might want to use a seperate reference - eg. a '3 cent regulator'. The ADC reference voltage needs to be matched to the input range to maximise the SNR. Since your input is greater than the maximum reference voltage (Vdd) you want the reference voltage to be as large as possible and the input attenuation to be as small as possible - ie.  5V reference with a divide by 4 attenuator.


--- Quote ---Noise wouldn't be a problem for my application, but would be nice if I didn't have to re-calibrate it, if VDD changes a bit. I could use pots in series to R7 and R5 to adjust the center and scale it to exactly +/-10V for full scale.
--- End quote ---

Since you only need 5 or 6 bits of accuracy (or precision?) this seems unnecessary, but harmless.


--- Quote ---I think the input impedance of 150k is no problem for my application to sample the signals of a programmer. If I want to sample some sensitive analog circuits, I can always use an external pre-amplifier.

--- End quote ---

What is the highest frequency you want to monitor? Even 150k is a bit high - LTSpice shows 1.9MHz, but any additional parasitics will reduce that - presumably LTSpice uses only the 4891 input capacitance in it's model.

You don't need to add a buffer amp for the offset voltage - given the 150k input resistance, a divider of 333/667 ohms to provide the 3.33V offset will barely impact the input attenuator at the cost of only 5mA from the 5V supply. If you aren't happy about that then consider using an inverting configuration as attached.

[EDIT] Note: C1 is to represent parasitic capacitance - change the value to see the impact on BW.
FrankBuss:
Cool, only one OpAmp left now! Inverting is no problem. But with the positive reference I think VRTS will be better than the +5V, because it is USB powered, and can be very noisy and getting low like 4.8 V depending on cable quality etc., and would be nice if it would be at least maybe 0.2 V accurate. But I added some 0 ohm resistors, will try it on the prototype, if it works when VRB is connected to GND. And if VRTS is not good enough, I can bodge some voltage regulator at this input as well on the prototype. Attached is the next version.

I added an additional fuse at the input as well, costs only cents: https://www.digikey.de/short/j1th73 Just in case someone would try to measure mains with it, it would at least give a little bit protection. It is a fast fuse, I hope it doesn't blow from ESD? Should I use more than 250 mA?
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