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| 4 channel ADC, 10 MHz, 8 bit design |
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| FrankBuss:
I got the board and soldered the first channel: You were right, I can just connect VRB to GND and it converts down to 0 output reading. For VRT I used the 4 V reference. A first test with 1 MHz square wave had some overshooting. I added a 1 pF capacitor for C3, no capacitor for C1, and it looked like this: I guess the potentiometer RV2 adds some more capacitance, because I could even lower it to 0.5 pF. Then it starts to wiggle a bit, but even better edges: The FPGA is sampling it with 25 MHz and I read it over the serial port with 1 Mbaud with this Python script, which also displays the nice oscilloscope diagrams and updates it live, with about 2 seconds per frame. Next will be soldering the other 3 channels. Then I will finish the FPGA programming, because at the moment I'm using just the internal block RAM, but I plan to use the 1 GB DDR3 RAM. I hope I can save all the data at this bandwidth. Maybe I need to add a FIFO for saving it without gaps, in case the DDR RAM decides to do a refresh etc. Later I can use the ARM on the Cyclone 5 and Linux to transfer the data over ethernet. But this might be some work to access the DDR RAM from both, the ARM and the FPGA part of the Cyclone 5, and Linux driver development etc. But shouldn't be too much work. |
| StillTrying:
The 1MHz shape looks OK, must be close to 10MHz worth, but I can't see how the +/- 7.5 scale relates to the op amps expected ~0V to ~4V ? output. I would think any overshoot or undershoot on fast edges depends on the actual amplitude of the op amps output, or at least it does when I try for a large fast dynamic range. :) |
| FrankBuss:
I tested it with a 15 Vpp AC square wave, generated with my Siglent SDG1050. In the Python script you can see at line 70 that I scale the linear output of 0..255, to -10..+10 with (d / 256 - 0.5) * 20. Then I turned the two potentiometers until it looked right in the live update :) They are quite sensitive, I think I should use some fixed resistors and smaller potentiometer values in the next revision. For testing that it goes to 0 and 255, I turned the offset potentiometer and watched the output on the console, where I added a min/max calculation of the values, see line 72. The waveform didn't get distorted near the limits 0 and 255, so looks like the OpAmp and the ADC both can go down to 0 V (at least good enough for the 8 bit resolution), and of course up to 4 V is no problem. I guess I could do some more measurements, but this is good enough for me. But maybe I should scale it to -10.24..+10.24. Then I would just need to multiply it by 8 (and then subtract 1024), and the result would be exact 10 mV steps. This would be nice for a digital multimeter display. And maybe a relay at the input with some reference voltages, and then using digital potentiometers would be nice too. And then a full conventional input stage with switchable ranges, like -100..+100, -10..+10, -1..+1. So many ideas, maybe later :) |
| StillTrying:
I tested it with a 15 Vpp AC square wave. I see, for a +/-10V input I'd agree +/-7.5V is a good testing amplitude, 0.5V-3.5V at the ADC. In the Python script you can see I'm only looking at a pdf schem. and I'm not even sure that's the lastest, couldn't get the github one. The bottom of the 1MHz square wave is staying exactly on the -7.5V line, what's causing the tops to drift up and down 5 or 6 ADC counts, especially noticeable in the first graph. |
| FrankBuss:
In github is the latest KiCad schematic. I update the PDF file, too: https://github.com/FrankBuss/adc4/blob/master/kicad/adc/adc1-ADC1.pdf Maybe the drift is because of the suboptimal test setup with a breadboard, and using jumper wires to connect ground, which I guess I really shouldn't do. But I think it is probably only like 4 counts drifting. This would be 6 digits resolution, which was my goal, so fine for me, at the moment. But you are right, it is strange that the top drifts more than the bottom. BTW, I forgot to invert the voltage in the Python script, so +10 V in the diagram really means -10 V at the input, and +10 V in the diagram means 255 at the ADC digital output. |
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