Author Topic: 4-layer PCB stackup for a pulse gen  (Read 451 times)

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Offline metebalci

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4-layer PCB stackup for a pulse gen
« on: April 02, 2021, 12:07:47 pm »

I am experimenting with a simple pulse gen design (oscillator IC + wideband opamp, tr<1ns). I need at least 2 VCCs (+5, -5 at the moment), a few 50-ohm traces, and edge mounted SMA. As far as I understand there are at least 3 possible ways to design PCB, and I am new to PCB design.

1) SIG-GND-GND-SIG: I tried this, and since the circuit is very simple and I did not put voltage regulators yet, it was enough to route both power and signals on layer 1.

2) SIG-GND-VCC-SIG: I guess then I divide the VCC layer into 2/3 sections for each VCC level I need.

3) GND-SIG-SIG-GND or something like this: I am not sure if this makes sense or have any pros over the options above. Also not sure how to properly mount the SMA connector at the edge in this case.

Which one would you prefer ? Particularly between 1 and 2.
 

Offline vad

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Re: 4-layer PCB stackup for a pulse gen
« Reply #1 on: April 03, 2021, 03:35:54 am »
SIG-GND-GND-SIG
 

Offline vad

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Re: 4-layer PCB stackup for a pulse gen
« Reply #2 on: April 03, 2021, 04:02:59 am »
I do not see much benefit in SIG-GND-VCC-SIG. There won’t be much added capacitance between VCC and GND in a 4-layer board (there would probably a thick core between layers 2 and 3).

Having solid GND next to each SIG plane always wins. Unless the board is a low density, placing components on external GND plane is also a compromise.

So SIG-GND-GND-SIG it is.
 

Offline T3sl4co1l

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Re: 4-layer PCB stackup for a pulse gen
« Reply #3 on: April 03, 2021, 04:33:23 am »
Doesn't matter much, you'll have about one bypass cap per supply per chip anyway, and there's only two chips total.  I wouldn't feel bad about doing it on 2 layers, though maybe the flatness would suffer.  (Heck, I don't even have a scope fast enough to tell, if you really do mean an op-amp with step response under 1ns.)

Tim
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Offline metebalci

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Re: 4-layer PCB stackup for a pulse gen
« Reply #4 on: April 03, 2021, 08:10:51 am »
Thanks for all the comments. I will continue with S-G-G-S then.

At this point, it is actually OK to do it with two-layers, but 50-ohm trace is then too wide and I think I will need the second signal layer in the future anyway, it is my toy project for high freq. Yes, I meant 1ns, I made the prototype on copper clad etc. and I can see it is around 500ps, so I want to move it to PCB and also add voltage regulators to run with a battery or adapter etc.


 

Offline spostma

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Re: 4-layer PCB stackup for a pulse gen
« Reply #5 on: April 15, 2021, 10:24:29 pm »
an EMV consultant of the firm DARE! once told me that a single uninterrupted ground plane suffices all practical needs,
and is almost always superior to a double ground (or power) plane!

The reason is that a trace with a fast signal current will cause a retun curent immediately under the trace in the ground plane.

When you use multiple ground planes, the return current in the ground plane will induce other return currents in the plane(s) below it,
and these will bounce or return somewehere you do not expect it - unless you stitch both ground planes with MANY vias. along all high-speed traces.


Also do not route high-speed signals near the edge of the ground plane .
 

Offline T3sl4co1l

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Re: 4-layer PCB stackup for a pulse gen
« Reply #6 on: April 15, 2021, 10:46:04 pm »
Note that power and ground planes meet that definition, as the planes are bypassed together in various locations with capacitors. :)

In fact, aside from heavy loads (large bus drivers, CPUs/FPGAs?), the location of bypass caps is largely irrelevant, and they can be sprinkled evenly around the planes.  Probably with some savings on parts count too (compared to automatically bypassing every single power pin)!

Even if not bypassed, we can always ask: how much?  The description sounds plausible (signals bouncing around between planes), so let's do a reality check and see what magnitude we expect from it.  Well, the plane is a low impedance transmission line, so for very short signals, we don't expect much funny business; even crossing over gaps between planes (such as from one VCC domain to another -- note, not gaps across ALL planes: there must still be at least one contiguous (preferably GND) plane at any such crossing!), the image current sneaks under the edge of one plane and immediately pops up from the other; between planes, that current fans out broadly, the characteristic impedance dropping quickly with time.  So, it's effectively like there's a hairpin loop in the trace, as if it rose up away from the plane (like a one-turn air core inductor).  This is an impedance discontinuity, but a brief one, permissible for many digital buses, including PCIe (also, as long as it manifests common-mode, it's fine for differential pairs).  Much faster (10s ps?), or precise, signals will want to avoid this kind of environment, of course.

So it might be fine for functional operation, or signal quality.  That's one signal with respect to its transmitter and receiver.  Is it fine for emissions or immunity (external transmitters or receivers)?

About that current which fans out between planes: It will eventually find some bypass caps, reflect off them (because the vias, traces and cap bodies act as shorting loops), and so on and so forth, the wavefront scattering and dissipating over time.  When impedances are matched and well damped, the dissipation dominates, and the planes go.. "thud".  Some disturbance might be sensible elsewhere (say on other power pins), but it will likely be small, and brief.  We can draw the equivalent circuit, between the signal trace impedance, plane impedance, bypass caps and other supply impedances, and calculate how much ripple will be produced.  Or measure it the same way (being careful to get a very solid ground for our probe, to rule out common mode influence -- we're talking mV here!).

Likewise, a poorly terminated plane might end up resonating against poorly chosen or placed bypass caps, and in that case the whole plane pair acts as a patch dipole antenna, potentially quite an effective radiator at high frequencies (say 100MHz+, with an asymptotic tail at low frequencies where the board is electrically small and thus a poor radiator but still a radiator nonetheless, given a strong enough noise source!).

Conversely, a plane pair acts as an antenna, picking up whatever ambient noise is present.  If its impedance is low at all frequencies, it acts as an effective impedance divider (or weirder things when wavelengths get involved) to those fields, coupling poorly to them.  Whereas an accidentally resonant plane will have an impedance peak, that can couple much more strongly.

These are all reciprocal systems of course, so whenever a structure is a good transmitter, it is also a good receiver.  Technically, I don't have to enumerate all these conditions, but brains are weird, and it can help to remind ourselves of these facts lest we forget them...at our own expense. :)

Tim
« Last Edit: April 15, 2021, 10:50:14 pm by T3sl4co1l »
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