That's a normal stackup and it usually means fairly uninterrupted ground/power planes with very low parasitic inductance while having just a bit of inherent capacitance. Two signal layers are likely enough as long as your tracks aren't so wide, but if you need to, keep the breaks short and to a minimum. Every signal via is effectively a tiny break in the plane, but because the distance around it isn't big and the width on either side is still large, it doesn't contribute a lot to overall plane impedance. Remember, parasitic inductance is probably the biggest enemy in power rails for high speed designs, so keeping the loop area to a minimum is always best, so as long as there isn't long breaks and snaking routes for the current to take, you're probably on the right track. Less of an issue, but still something on thinner inner copper layers, trace resistance is per square, with no additional units, so a trace that is twice as wide and is the same length is half the resistance, so again keeping it as filled in as possible and as far from snaking standard traces as possible, the better... but unless you're running really high currents, once you get past a few mm wide, resistance will be basically negligible on half ounce copper for most digital logic stuff.