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4028 chip in LTSpice subcircuit


Just wanted to share my 4028 simulation in LTSpice.

I made it as an subcircuit by first creating an equivalent circuit.

Then I labeled the nets used by the chip

The voltage sources are actually arbitary behavioral voltage sources to simulate the output of the 4028 chip.
B1 : V=(!(V(In3)) & !(V(In2)) & !(V(In1)) & !(V(In0)))*V(Vdd)                     (logical AND of all inverse In signals times Vdd)
B2 : V=(!(V(In3)) & !(V(In2)) & !(V(In1)) & (V(In0)))*V(Vdd)
B3 : V=(!(V(In3)) & !(V(In2)) & (V(In1)) & !(V(In0)))*V(Vdd)
B4 : V=(!(V(In3)) & !(V(In2)) & (V(In1)) & (V(In0)))*V(Vdd)
B10 : V=((V(In3)) & !(V(In2)) & !(V(In1)) & (V(In0)))*V(Vdd)                      (logical AND of all In signals times Vdd)

Then save this file as 4028.asc

Then you have to create a symbole

Create the pins

Add the same Labels you used in the .asc-file. Netlist Order should be the pin number on the chip. If you use for example number 16, all pins from 1-15 must also be defined.

Save the files as 4028.asy in the same folder as the .asc-file.
I made an extra folder in the "sym"-folder of LTSpice to have my chip located in.

Then I made a test circuit with two cascading 4028's

Thats it. Then there is only about 200 chips to go...

I attach the files to save you some work if you're interrested in checking it out.

I'm still learning LTSpice IV v4.09.  I also just got Cadsoft Eagle 5 off the site.

But I have some old circuits I'm trying to debug and update them because about half the components used are old and no longer available.

Took me a while to move from the old hand drawn schematics to the model space onto the board level.

One of them involves a complex RF board that I did in the 1980s.  I have to move the board design from a muliti-board layout to a backplane style and a large main board, PLL, PSU and other things. Its quite a mess.  I could use some help.

Thanks for the visiualization of the CD4028, etc model.


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