Author Topic: 5 Transistor ESR Meter Design  (Read 165996 times)

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Offline dannyf

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Re: 5 Transistor ESR Meter Design
« Reply #25 on: November 10, 2013, 07:04:19 pm »
Quote
Schematic ?

Sure.

V1/R1 is your oscillator (in this case, a 555 running at 120Khz, 40% dc at 5vpp).

R3 is the measurement resistor +  current limiter: pick it to suit your particular oscillator. I am using a 200ma part so I picked R3 to output no more than 150ma current.

R1/C1 is the DUT. With the parameter given, the meter is good down to about 500mohm / 10u. Anything less is going to be difficult to read for a typical multi-meter.

D3 is optional.

The read out point is Vout.

The meter is unique in that Vout goes up monotonically with ESR. You can change that by swapping R3/DUT.

I also built a version with HC132 - It is simpler but the lower current capabilities means higher value R3, limiting the meter to higher value ESRs -> not a big issue.

You can expand the meter's capability by adding an amplifier, or expand its current capabilities.
« Last Edit: November 10, 2013, 07:09:00 pm by dannyf »
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Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #26 on: November 10, 2013, 11:34:49 pm »
Dannyf and the group,

I modified your LTspice model so that I could get a graph of Vout versus ESR.


These are the results:



The circuit is non-linear below 500 mOhms as you said. This is mainly due to the characteristics of the rectifying diodes. Since the main purpose of these meters is to find capacitors with high ESR values the circuit should be able to do that.

Your circuit also puts more than 0.6V peak on the capacitor under test, so if there are any diodes in parallel with the capacitor under test, the range is limited to about 8 ohms. Again this is not really a concern, because it is probably a bad capacitor.


Jay_Diddy_B
« Last Edit: November 10, 2013, 11:38:27 pm by Jay_Diddy_B »
 

Offline Stonent

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Re: 5 Transistor ESR Meter Design
« Reply #27 on: November 11, 2013, 08:52:43 am »
I'm loving the Allen Bradley 10K pot on it. It adds a bit of industial-ness to it.

A-B
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Offline BravoV

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Re: 5 Transistor ESR Meter Design
« Reply #28 on: November 11, 2013, 03:43:51 pm »
Before I designed the 5 Transistor ESR meter, I designed and built an ESR meter using a digital panel meter.

The design is unusual in that it uses 10kHz, instead of the more usual 100kHz. By using a synchronous rectifier to measure the in-phase component of the capacitor impedance.

Jay_Diddy_B, thanks, that looks interesting.

Now, as usual, incoming bombardments of noob questions  >:D :

- What is so special about that "synchronous rectifier" method compared to others common "cheap DIY" ESR measurement techniques ?
- Why 10 KHz ? How about other frequency like 100 KHz ? or lower ?
- Any pre-adjustments or tunings required when finished building it ?


Quote
Schematic ?

Sure.

dannyf, thanks for the circuit, this going to take times to digest here, remember, its an EEE here, not an EE.  ;D

But as Jay_Diddy_B pointed out, below 500 mOhm limitation will be quite difficult when dealing with ultra low ESR cap like those polymer type isn't it ? Sometimes it goes down to teens of mili Ohm.

About adding an amp for increasing it's current capabilities, mind elaborate further why we need that ? For bigger cap ?
« Last Edit: November 12, 2013, 01:51:13 am by BravoV »
 

Offline dannyf

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Re: 5 Transistor ESR Meter Design
« Reply #29 on: November 11, 2013, 04:17:14 pm »
Increasing the oscillator's current capabilities allows you to use a smaller measurement resistor, thus dropping proportionally more voltage on the dut -> higher reading out of the rectifiers. The basic principle of the circuit is to run at high enough frequencies so that only the ESR element of the capacitor has any impact on the output.

One simple but dumb way to increase the oscillator's current output is to use a buffer, like a pnp/npn pair configured as follower, or some mosfet gate drivers.

Alternatively, you amplify the signal out of the dut. An opamp will do - but in this particularly configuration, the signal will be very close to ground so you need to look for an opamp with pnp input stage.
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Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #30 on: November 12, 2013, 03:05:30 am »
Before I designed the 5 Transistor ESR meter, I designed and built an ESR meter using a digital panel meter.

The design is unusual in that it uses 10kHz, instead of the more usual 100kHz. By using a synchronous rectifier to measure the in-phase component of the capacitor impedance.

Jay_Diddy_B, thanks, that looks interesting.

Now, as usual, incoming bombardments of noob questions  >:D :

- What is so special about that "synchronous rectifier" method compared to others common "cheap DIY" ESR measurement techniques ?
- Why 10 KHz ? How about other frequency like 100 KHz ? or lower ?
- Any pre-adjustments or tunings required when finished building it ?

This screen shot from the scope will help answer the questions.



The upper trace is the output of the 10kHz oscillator.
The second trace is the output of the 10kHz bandpass filter, a reasonably nice sine wave.
The next trace is the output of the differential amplifier, that is the voltage across the capacitor under test.
The lower trace is the output of the synchronous detector. The imaginary components cancel. The in phase component, the resistive part is averaged and then displayed on the meter.

In this scope shot I am measuring a 4.7uF capacitor with an ESR of 1.2 Ohms. impedance  Z= 1.2 -3.3j ohms,    |Z|= 3.5 ohms.
The ESR meter correctly reads 1.2 Ohms.

10KHz was chosen as a compromise. 100kHz is the traditional frequency used for ESR measurements. At a 100KHz I would have needed some faster op-amps and a better analog switch.

I have checked this circuit against an HP 4274A LCR (Z) meter and it gives very accurate results for the cost.

There are several weaknesses in this design:

1) The amplitude of the square wave is dependant on how close the op-amp can swing to the rail.

2) The amplitude of the sine wave depends on being in the center of the band pass filter.

3) I tweaked the value of the R23 to obtain the calibration.

This circuit has a nice linear response. It is a true ESR meter, it is not an impedance meter. It use as nice low voltage test signal to allow in circuit measurements. It will work with a DMM, but you have to multiply the voltage read by 10x to get ohms.

Jay_Diddy_B



« Last Edit: November 12, 2013, 03:12:32 am by Jay_Diddy_B »
 

Offline BravoV

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Re: 5 Transistor ESR Meter Design
« Reply #31 on: November 12, 2013, 04:13:41 am »
Thanks for the signal's scope shot, that helps me to further getting a grip on this circuit.  :-+

Btw, I have to be honest with you, that most of my questions are from an enthusiast level perspective, which emphasizing more at practicality point of view. Its not I'm lazy to learn in depth on how it works, its just it will take much longer time for me to catch up since without any strong foundation of electronics knowledge, and experiences like you EE or pro do. While the main interest is still on building it, hope you can bear with me here.  :P

More ..   >:D

10KHz was chosen as a compromise. 100kHz is the traditional frequency used for ESR measurements. At a 100KHz I would have needed some faster op-amps and a better analog switch.
How fast op-amp needed at 100 KHz ? Any example of popular op-amp ? Non the exotic one if possible, please.


There are several weaknesses in this design:

1) The amplitude of the square wave is dependant on how close the op-amp can swing to the rail.
2) The amplitude of the sine wave depends on being in the center of the band pass filter.
3) I tweaked the value of the R23 to obtain the calibration.
So I'm assuming from above points, this circuit has a fixed test frequency ?


This circuit has a nice linear response. It is a true ESR meter, it is not an impedance meter. It use as nice low voltage test signal to allow in circuit measurements. It will work with a DMM, but you have to multiply the voltage read by 10x to get ohms.
Will a cheap say like common low offset op-amp, set up as 10X gain connected at TP7 enough for that ? cmiiw


Have no intention to derail the discussion from this fine circuit, just curious about another diy esr meter circuit that output to DMM -> here (scroll down abit at the bottom), or link to the schematic -> here for better view.
Does it use the same/similar synchronous rectification method ? The reason I bring this out because I see it uses switches to switch the test signal back & forth like yours.  :-//

Offline Stonent

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Re: 5 Transistor ESR Meter Design
« Reply #32 on: November 12, 2013, 04:21:33 am »
Thanks for the signal's scope shot, that helps me to further getting a grip on this circuit.  :-+

Btw, I have to be honest with you, that most of my questions are from an enthusiast level perspective, which emphasizing more at practicality point of view. Its not I'm lazy to learn in depth on how it works, its just it will take much longer time for me to catch up since without any strong foundation of electronics knowledge, and experiences like you EE or pro do. While the main interest is still on building it, hope you can bear with me here.  :P

More ..   >:D

10KHz was chosen as a compromise. 100kHz is the traditional frequency used for ESR measurements. At a 100KHz I would have needed some faster op-amps and a better analog switch.
How fast op-amp needed at 100 KHz ? Any example of popular op-amp ? Non the exotic one if possible, please.


There are several weaknesses in this design:

1) The amplitude of the square wave is dependant on how close the op-amp can swing to the rail.
2) The amplitude of the sine wave depends on being in the center of the band pass filter.
3) I tweaked the value of the R23 to obtain the calibration.
So I'm assuming from above points, this circuit has a fixed test frequency ?


This circuit has a nice linear response. It is a true ESR meter, it is not an impedance meter. It use as nice low voltage test signal to allow in circuit measurements. It will work with a DMM, but you have to multiply the voltage read by 10x to get ohms.
Will a cheap say like common low offset op-amp, set up as 10X gain connected at TP7 enough for that ? cmiiw


Have no intention to derail the discussion from this fine circuit, just curious about another diy esr meter circuit that output to DMM -> here (scroll down abit at the bottom), or link to the schematic -> here for better view.
Does it use the same/similar synchronous rectification method ? The reason I bring this out because I see it uses switches to switch the test signal back & forth like yours.  :-//

Sounds like the same idea that Dave had with the uCurrent.
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Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #33 on: November 13, 2013, 03:01:17 am »

How fast op-amp needed at 100 KHz ? Any example of popular op-amp ? Non the exotic one if possible, please.


Will a cheap say like common low offset op-amp, set up as 10X gain connected at TP7 enough for that ? cmiiw


Here is a LTspice model for a 100 kHz version. This uses LTC6244HV dual op-amps. These have 50MHz GBW and 35V/us Slew rate.



I have attached the LTspice model. You can experiment with the LTspice model.

I really think that there is little advantage over using 100 kHz instead of 10 kHz.

A 10x simple op-amp could be used for 10x correction, but unless you have a 24 rail, you will limit the maximum resistance that can be read.

Have no intention to derail the discussion from this fine circuit, just curious about another diy esr meter circuit that output to DMM -> here (scroll down abit at the bottom), or link to the schematic -> here for better view.
Does it use the same/similar synchronous rectification method ? The reason I bring this out because I see it uses switches to switch the test signal back & forth like yours.  :-//

Yes, the use of the analog switch to form a synchronous detector is similar. It applies a square wave current to the capacitor. In this circuit there is a trade off using analog switches at low signal levels and then dc amplification versus amplifying the ac signal and then using the analog switches.
It would be interesting to build a model of this circuit.

Jay_Diddy_B
« Last Edit: November 13, 2013, 03:03:52 am by Jay_Diddy_B »
 

Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #34 on: November 13, 2013, 03:58:51 am »
Hi,

This is the ESR meter mention by BravoV:



Here is a very simplified and idealized model for the Silicon Chip ESR meter:




The test results from LTspice:



I have attached the model if people want to play with it.

Jay_Diddy_B
« Last Edit: November 13, 2013, 04:05:24 am by Jay_Diddy_B »
 
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Offline dannyf

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Re: 5 Transistor ESR Meter Design
« Reply #35 on: November 13, 2013, 12:17:15 pm »
Quote
This is the ESR meter mention by BravoV:

Could you build a flip/flop from the spare gates? Or to build an oscillator from the spare flip/flop. Saving one IC.
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Offline kripton2035

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Re: 5 Transistor ESR Meter Design
« Reply #36 on: November 13, 2013, 03:34:11 pm »
you cn use a single gate inverter like this one from TI : http://www.ti.com/product/sn74auc1g06
this does not save an ic but saves space and eliminates useless gates.

Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #37 on: November 13, 2013, 10:26:36 pm »
Hi,
Unless, you redesign the circuit to work at lower voltages you can not use the SN74AUCxx series parts, they are low voltage parts.

The silicon chip design has the logic powered from -5 to +5V. The design use 4000 series CMOS.

To make a divide by 2, D-type flip-flop, I think that you need 4 two input gates. I can not see a way to reduce the IC count.

Jay_Diddy_B
 
 

Offline AndersAnd

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Re: 5 Transistor ESR Meter Design
« Reply #38 on: November 13, 2013, 11:33:20 pm »
 

Offline AndersAnd

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Re: 5 Transistor ESR Meter Design
« Reply #39 on: November 13, 2013, 11:39:26 pm »
Quote
This is the ESR meter mention by BravoV:

Could you build a flip/flop from the spare gates? Or to build an oscillator from the spare flip/flop. Saving one IC.
Speaking of saving components. Danny F in your design you could replace the two BAT54 with one BAT54S (two BAT54 in sereies):



 

Offline dannyf

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Re: 5 Transistor ESR Meter Design
« Reply #40 on: November 13, 2013, 11:51:00 pm »
Quote
I can not see a way to reduce the IC count.

Using two ICs of one type is also a move in the right direction.
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Offline dannyf

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Re: 5 Transistor ESR Meter Design
« Reply #41 on: November 14, 2013, 12:05:48 am »
Another way would be to use a mcu to output the two signals.
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Offline AndersAnd

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Re: 5 Transistor ESR Meter Design
« Reply #42 on: November 14, 2013, 01:13:38 am »
Another way to reduce component count is to replace the four 1N4004 diodes with a bridge rectifier. The bridge rectifier will then be hooked up in a unusual way with both the + and - outputs connected to GND.

At the top I drew a part of the original schematic and at the bottom a the modified schematic with the bridge rectifier.



 

Offline BravoV

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Re: 5 Transistor ESR Meter Design
« Reply #43 on: November 14, 2013, 04:09:23 am »
Here is a LTspice model for a 100 kHz version. This uses LTC6244HV dual op-amps. These have 50MHz GBW and 35V/us Slew rate.

Whats the minimal GBW & slew rate for this to work ?


I really think that there is little advantage over using 100 kHz instead of 10 kHz.

Ok, I keep hearing this, is there any examples where 100 KHz has the advantage over 10 KHz ?


A 10x simple op-amp could be used for 10x correction, but unless you have a 24 rail, you will limit the maximum resistance that can be read.

I think max resistance at 10 Ohm should be good enough ? Especially majority uses of this kind of diy esr kit will be sorting out old and bad caps. Or maybe checking if they've been conned by a shady seller after buying those cheap ultra low esr polymer caps.  >:D


Yes, the use of the analog switch to form a synchronous detector is similar. It applies a square wave current to the capacitor. In this circuit there is a trade off using analog switches at low signal levels and then dc amplification versus amplifying the ac signal and then using the analog switches.
It would be interesting to build a model of this circuit.
The test results from LTspice:
I'm still lost in understanding that circuit, what this test result is telling if you don't mind explain a bit ?  :P
« Last Edit: November 14, 2013, 04:20:25 am by BravoV »
 

Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #44 on: November 14, 2013, 05:02:57 am »
I really think that there is little advantage over using 100 kHz instead of 10 kHz.

Ok, I keep hearing this, is there any examples where 100 KHz has the advantage over 10 KHz ?

Using a 100kHz has advantages if you design an ESR meter that measures the impedance of the capacitor instead of the ESR. This determines how effective the meters work for low value capacitors.
If the meter is able to measure the in-phase component of the impedance, which is the ESR, then the frequency does not need to be as high.
General speaking you can tell by looking at the rectifier. If the rectifier use analog switches driven by the source, then the meter is measuring the ESR. If diodes are used then circuit is measuring impedance.

I'm still lost in understanding that circuit, what this test result is telling if you don't mind explain a bit ?  :P

The test result has the value of the test resistor on the X axis and the output voltage or meter reading on the Y axis. What you are looking for is a straight line that goes through 0,0. This tell you that the meter is linear and has the capability to measure low values of ESR accurately. You can also change the value of the capacitor in the simulation. A good ESR meter will be able to measure the ESR of a low value capacitor correctly.

In the 10 kHz digital ESR meter that I post I can correctly measure a 4.7uF capacitor with an ESR of 1.2 Ohms. This is good enough for me.

Here is a 4.7uF 85C capacitor in the homemade 10kHz ESR meter:



Here is the same capacitor in an HP 4274A Multi-Frequency LCR meter (5 1/2 Digits 0.1% , around $1000 to $1500 for a used one, the 16047D Test Fixture is worth about $250.00):




Close enough for me  :-+

Jay_Diddy_B
« Last Edit: November 14, 2013, 05:12:49 am by Jay_Diddy_B »
 

Offline BravoV

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Re: 5 Transistor ESR Meter Design
« Reply #45 on: November 14, 2013, 06:27:07 am »
Using a 100kHz has advantages if you design an ESR meter that measures the impedance of the capacitor instead of the ESR. This determines how effective the meters work for low value capacitors.
If the meter is able to measure the in-phase component of the impedance, which is the ESR, then the frequency does not need to be as high.

Btw, here as an example I'm talking about an enthusiast that is trying to fix a switching power supply, and don't have any other tools like a scope to watch the ripple. Only cheap DMM and the cheap diy esr meter, I used to be like that.  :'(

Now, questions from that "enthusiast's" perspective, since I believe this represents most of the cases in hobbyist world. I'm troubleshooting a power switcher and suspecting the caps at the secondary side are bad. Looking at the datasheet the cap's ESR specification measured at 100Khz say 20 mili Ohm, now, if I'm going to verify those cap whether they're still in spec, by using again, a cheap DIY ESR meter, will 10Khz signal is good enough ?


The test result has the value of the test resistor on the X axis and the output voltage or meter reading on the Y axis. What you are looking for is a straight line that goes through 0,0. This tell you that the meter is linear and has the capability to measure low values of ESR accurately. You can also change the value of the capacitor in the simulation. A good ESR meter will be able to measure the ESR of a low value capacitor correctly.

Great learning here, thank you !  :-+


In the 10 kHz digital ESR meter that I post I can correctly measure a 4.7uF capacitor with an ESR of 1.2 Ohms. This is good enough for me.

As above example, say you yourself are verifying a new purchased of a batch of expensive OS-CON ultra low esr caps that has just few teens of mili Ohms, how are you going to do that ? I'm really interested to hear this.


Here is the same capacitor in an HP 4274A Multi-Frequency LCR meter (5 1/2 Digits 0.1% , around $1000 to $1500 for a used one, the 16047D Test Fixture is worth about $250.00):

Sigh ... I rejected an offer while ago on this exact piece of nice gear with out the test fixture though, for about < $200 locally here when I was totally a noob.  :'(
« Last Edit: November 14, 2013, 07:12:58 am by BravoV »
 

Offline kripton2035

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Re: 5 Transistor ESR Meter Design
« Reply #46 on: November 14, 2013, 07:06:19 am »
if you dont have an enought precise esr meter, just change the suspected capacitor with an almost the same one
the secondaryside capacitors are not very special.
I always have some high voltages capacitors (400v 10µ 22µ or 47µF) on hand to test the high side capacitor easily
I have a small analog diy esr meter (the poptronix modified one) and it has detected a big quantity of bad capacitors, but sometimes it doent detect anything. example : a motherboard plane with 20 capacitors in parallel : you have to desoldier all of them ( and it's not easy at all) and test them but your diy meter is not enought precise to detect clearly in the ten m? range ...

Offline notsob

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Re: 5 Transistor ESR Meter Design
« Reply #47 on: November 14, 2013, 08:51:15 am »
here's one with an analog display

http://www.users.on.net/~endsodds/esr.htm
 

Offline Jay_Diddy_B

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Re: 5 Transistor ESR Meter Design
« Reply #48 on: November 14, 2013, 01:19:11 pm »
Hi Notsob and the group,

Here is a quick analysis of the VK5JST ESR meter. The operation of this meter is very similar to the 5 transistor design at the start of this thread. It place the rectifier inside the feedback loop of an op-amp. This type of  circuit has the advantage that the signals are larger for small ESRs than they are for higher values.

Model:



Meter Deflection versus ESR:



There makes for a nice non-linear scale on the meter.

I have attached the LTspice model for people who want to experiment.

Jay_Diddy_B
 

Offline BravoV

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Re: 5 Transistor ESR Meter Design
« Reply #49 on: November 15, 2013, 01:50:23 am »
Here is a quick analysis of the VK5JST ESR meter. The operation of this meter is very similar to the 5 transistor design at the start of this thread. It place the rectifier inside the feedback loop of an op-amp. This type of  circuit has the advantage that the signals are larger for small ESRs than they are for higher values.

Off topic, in above simulation, which parts represent the analog meter ?


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