5uH LISN for Spectrum Analyzer EMC/EMI work

[Knuddel]

Found this online tool:
https://www.leleivre.com/rf_coplanar_gb.html

It seems that the resulting impedance is relatively insensitive to the gap and trace width with this coplanar approach.
Online tool calculates 1.6mm for the DM/CM PCB, too.

[Jay_Diddy_B]

Hi group,

I used this calculator:

Link: https://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

2mm trace with 0.5mm gap on standard 1.6mm Fr4 (Er = 4.5)

is close enough for this application.

In practice there is a large impedance discontinuity between the LISN and the device under test.

The trace length in this projects is around 50mm. At 100MHz this represent 1/60th. of a wavelength. You don't have to worry too much about mismatch.

[Noy]

So, now with a proper PC.. It's a mess to post here with a mobile (Android T9  tries everytime to convert english word into german.. an the "dancing" smileys are slowing down my phone..)

Used the same calculator as Jay_Diddy_B:

Coplanar wave guide with ground, used these calculators (crosscheck):

http://wcalc.sourceforge.net/cgi-bin/coplanar.cgi
https://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

and the given JLCPCB values:

https://jlcpcb.com/capabilities/Capabilities

4.5
1,53mm (0,035mm copper on both sides and 1.6mm pcb -> 1,53mm FR4)

PCB values:
Gap 0.2
Trace 1.231 (if JLCPCB did it right, this shoud be the trackwith)

This gives me 50.04 Ohm / 50.00 Ohm depends on the calculator.

Please find attached last Project files like i ordered the PCBs. Also some sweeps and pictures. The files have correct radius for Hammond 1590B cases (cheap from china, but the holes are a it off compared against genuine datasheet.. but it fits..)

[Noy]

rest of the files..

Used Diodes 1N4148W-7-F (lowest capacitance i found in 1N4148 diodes) and Epcos B88069X1023T203 also relative low capacitance..


One thing i missed in the design files.. i expanded the clearance on the bottom layer like Jay_Diddy_B told but forgot the clearance on top.. 
But i think the sweeps are ok so i will not change something..

Will upload the design files for CM/DM seperator in the other thread..

[Jay_Diddy_B]

Noy,

In reply 103, you have a post a selection of measurements made with a Siglent SA or VNA. What are you measuring?

From the DUT port to the RF ports you should measure -10dB like this:





Jay_Diddy_B

[Noy]

Currently I'm not really common already with these kinds of measurments.. The SSA (now SVA) was my selfmade christmas present 2020..

So my ref is set to 0dB and an SA internal Attentuator of 20dB is activated. So my sweep from DUT banana to HF output is the shown trace with ~ -30dBm.

Incorrect? 20dB internal + 10dB external = -30dB or am i wrong?

One thing i currently don't understand is:
I set the internal Attentuator to 0dB and set the TG output level to 0dB (normaly its -20dB) and it was connected through the lisn.
Then the SA beeped and said that die ADC is in overload was a bit frighthend then.. But why? Input is up to +30dBm and if i set TG to 0dB and internal to 0dB and i have external -10dB why could there be an overload? My ref level was 0db..

Also if the internal Attentuator is -20dB + external -10dB and the used TG has an output of -20dB why not -50dB in total? Its -30dB? Or is the SA compensating the TG out?

Unsure... have to learn a lot and hopefully didn't kill my input mixer first..

Thats the point why i want a Transient Limiter with the already purchased PIN diodes..
Next PCB i will do together with a OPA659 active probe....

[essele]

I've read this thread with great interest as I'm keen to start understanding more about EMI testing for a specific (hobby) project I'm working on. Clearly I don't *need* to do any testing, but I'm planning on open sourcing the project at some point, and generally it's for use with sensitive test equipment so I do want to at least have a rudimentary idea that it's not doing anything too nasty ... also it's a great learning experience.

An overview is here for reference (it has moved on a bit since then, I'll post an update shortly): https://www.eevblog.com/forum/metrology/yaugi-4-gpib-ethernet-poe-adapter/

So this can be PoE powered, using a DC/DC converter of my own making (which inevitably will need some work) and can also be powered from USB. So I'd like to build something that allows me to test these ports.

In CISPR 32 (or the UK equivalent at least) there is the following example schematic for an AAN (which I'm assuming is the same as a LISN??) for anything up to 4 balanced pairs. Which I'm assuming will cover the four pairs in the ethernet port and the data pair in the USB?? (I'm also assuming I'd need something like the above to test the USB power side??)



So I though I might have a go at building something like this, I'm very happy to make loads of mistakes and learn from the experience. But I'm not really familiar with the inductor side of this (L1/L2) .. I'm assuming for L1 for example, that there are 9 1.4mH inductors wound on a common core? Is that as simple as getting a ferrite rod and winding 9 different coils on it, if so, then when measuring each inductor for accuracy would I need to terminate the others some how? Is spacing between them important? Or am I just biting off something that's too difficult?

Any help really appreciated.

Lee.

[T3sl4co1l]

If you read further in that standard, I think you will find construction details, or maybe it's in a related standard I'm not sure.

If you start with 4 pair STP, the 9th (receiver) winding is the shield.  All you need for the inductor is a core with enough winding area to fit the required turns.

For the DM chokes I recommend pot cores: they have high A_L and short turn lengths, minimizing electrical length of the winding, which appears as a stub transmission line to the signal pair.

I made a smaller one here: https://www.seventransistorlabs.com/Precompliance/index.html

Tim

[essele]

Just to report that I've also completed a 5uH LISN using the design from Jay_Diddy_B and Noy -- thanks!

I think I've got a pretty good response curve for both ports ... this was tested using a dual-banana to BNC adapter (which annoyingly I had to hold in place because the distance between the pos/neg and GND isn't standard???)

So I rigged up a pass through using as similar a setup as possible (including BNC to SMA adapters), used that as a reference and normalised. Then attached the LISN in the path (using the DUT port and the output.) I tested positive and negative (to GND) separately. Both look very similar and give a pretty flat 10dB and it only really starts to drop off above 250MHz, hitting about 14db at 500Mhz.

I then checked the impedance after a SOL calibration ... this isn't quite so good ... between about 6Mhz and 40Mhz it's 60ohms ... but I'm not sure what the bounds of "good" actually are. I've plotted a 501 point result so it's easier to see, but I'm not entirely sure I'm doing this correctly. I'm interested in pointers on this and if there's anything I can tweak (if needed.)

My first tests with one of my projects didn't really reveal much other than some intermittent peaks below 150kHz, so I need to find a few more things to look at, and I don't have any of the ground plane stuff in place.

This was built using PCB's from JLCPCB (using the original KiCad designs just with a bit of a silk screen tidy up on the component side) and most of the components from LCSC, I think it was only the inductors, the keystone test jacks, and the enclosure that came from Mouser.

Lee.

EDIT:  Just noticed the "UNCAL" on the SVA screenshots, need to investigate this, not noticed it before. Also just spotted how bad the test jack soldering looks on the photos ... looks much better in real life, but clearly needs a bit of work ... I think I need a bigger soldering iron!

[Jay_Diddy_B]

essele and the group,

You need to terminate the RF port with 50 when measuring the input impedance or you will measure 61 .

Consider this:



Repeat with the RF port terminated and report back to the group.

Best regards,
Jay_Diddy_B

[essele]

Thanks Jay_Diddy_B ... that did the trick although I'm not sure I fully understand the rationale. (Excuse the very poor quality termination, it was the easiest thing to do quickly!)

You will notice I've done it the other way around, terminating the DUT port and measuring through the RF port and I'm assuming that it doesn't really make a difference as it it can be used to inject also??

The impedance is excellent now, with pretty much 50 ohms from about 3MHz through to 160MHz.

So I had assumed that the RF port needed to be 50 ohms to provide a matched input into the VNA, but in normal use the DUT port is unlikely to be 50ohms surely? Therefore it won't be correctly terminated and the RF port will not be properly matched? I am new to all of this, so it's highly likely I just don't understand!

Thanks,

Lee.

 

[Noy]

Hi, nice to see other build. And yes also figured out that i forget to set the bananaplugs in "standard" dimensions... Sorry..

But it's not a huge impact. normaly you wouldn't use BNC cables to power your devices or? ;-)

[oz2cpu]

link to where to order the ready made PCB's ?
or gerber download ? so we can order our self ?

no need to reinvent the wheel :-) 

PS: thanks a million times for your time and energy and shared designs, both files, measurements
implementations, found and tested parts, good style..
I plan to share some of my EMC measurement tools soon also,

[Kibabalu]

link to where to order the ready made PCB's ?
or gerber download ? so we can order our self ?

no need to reinvent the wheel :-)

On Github you can find for example

https://github.com/LibreSolar/5uh-dc-lisn

The design is based on this thread. You'll find both Eagle and KiCAD files, if you want a starting point for your own modifications.

I build two of it and they are working well

[Noy]

Or look at my  Reply #94 in this thread. There are all design files for my version.
Ordered them from JLCPCB. You can use "set specific position" on order so you get the JLCJLCJLC on the front silkscreen used for JLCPCB order number stuff..

[essele]

Or look at my  Reply #94 in this thread. There are all design files for my version.
Ordered them from JLCPCB. You can use "set specific position" on order so you get the JLCJLCJLC on the front silkscreen used for JLCPCB order number stuff..

Yes ... I missed this, so have a nice "JLCJLCJLC" on the front of mine.  I never really understood why you didn't use the back silkscreen? ... it's not an extra cost, the order number can be completely hidden, and you can get all the component references on, which makes assembly much easier.

[Kibabalu]

Yes, with Noy's version you don't have to build two like me!

[Pinkus]

.....  I never really understood why you didn't use the back silkscreen? ... it's not an extra cost, the order number can be completely hidden, and you can get all the component references on, which makes assembly much easier.

I never tried that with JLCPCB - can you place the JLC order number to the bottom side? I assumed they needed all the numbers on the top to make it easier to match up the boards in a large panel.

[essele]

They have been pretty good whenever I've done any kind of front panel, without even asking they tend to put the number on the back!

Here's a shot of the front and back of the boards I had made, you can see the number tucked away underneath one of the fixing holes ... I just wished I'd spotted the JLCJLCJLCJLC on the front ;-)

[Noy]

I took green soldermask because i used my Quinsy reflow IR oven. And i was a bit frightend to use black soldermask and get burned PCBs.. And normaly green soldermask has the best / finest quality because its a liquid process and i think other colors are a kind of foil process take a look at JLCPCB capabilities site.
But you can use the color you like most.
And the bottom silkscreen is missing (thats the reason why JLCJLCJLC is on top..) because i was lazy ;-) i will build 2 LISN and Im using kicad html BOM plugin which helps a lot with interactive position light up.. so no need to do all the work of placing the silkscreen on pretty positions.

[nike75]

Hello all, Hi Noy and Jay_Diddy_B,

many thanks for great work. I am impressed with the project and I want to do it.
I looked at the gerbers files (old 27.12 and last 04.01) and noticed the following detail:
Coplanar line is provided with gap 0.4mm - not 0.2mm as discussed. When I use online calc with w=1.23mm, h=1.53mm (for 1.6mm pcb), gap 0.4mm and Er=4.5 result is 58.6 ohm.
May be I make some mistake or have a wrong clearance in PCB design.

If I use last gerbers, I need to order PCB's with thicknes of core 0.82mm for 50ohm impedance but this value will reduce mechanical strength of device.

Thanks,
Nike

[Jay_Diddy_B]

Hello all, Hi Noy and Jay_Diddy_B,

many thanks for great work. I am impressed with the project and I want to do it.
I looked at the gerbers files (old 27.12 and last 04.01) and noticed the following detail:
Coplanar line is provided with gap 0.4mm - not 0.2mm as discussed. When I use online calc with w=1.23mm, h=1.53mm (for 1.6mm pcb), gap 0.4mm and Er=4.5 result is 58.6 ohm.
May be I make some mistake or have a wrong clearance in PCB design.

If I use last gerbers, I need to order PCB's with thicknes of core 0.82mm for 50ohm impedance but this value will reduce mechanical strength of device.

Thanks,
Nike

Hi,

This was discussed in this message:

Link: https://www.eevblog.com/forum/projects/5uh-lisn-for-spectrum-analyzer-emcemi-work/msg3419946/#msg3419946

My original design was 50 .

At 100MHz and very short segments, an exact match is not required.

Use normal 1.6mm (0.062") PCB and it will work fine.

There is a very good chance that the wiring between the device under test, DUT, and the LISN is not 50 ...


Regards,

Jay_Diddy_B

[nike75]

Hi,

Certainly for these frequencies and this length the inaccuracy in the impedance will not matter much. However, I decided to adjust the layout. In order to have the least changes and keeping the shape of the polygon, I increased the tracks to 1.48mm and thus the gap is reduced to 0.275mm. According to the online calculators, this provides the required impedance.
I share a corrected gerber file.

[hydrabus]

Hi Everyone,

I have discovered this thread about LISN and it is a very amazing project and so I have created a project on GitHub to enhance actual version of the 5uH Dual LISN (I have removed the 50uH version as I do not need more than 60V / 5A for my needs and for safety reasons)
The GitHub link is https://github.com/bvernoux/5uH_LISN
The license MIT License so it is fully open
Thanks to Jay_Diddy_B & Noy for that amazing project.
Anyone is welcome to contribute on this project of course there is several tasks to dispatch but so far there is only one issue to discuss about features/improvement see https://github.com/bvernoux/5uH_LISN/issues/1
Actual versions is based on Noy version from https://www.eevblog.com/forum/projects/5uh-lisn-for-spectrum-analyzer-emcemi-work/msg3419992/#msg3419992
Modifications are mainly:

• Converted the KiCad 5.x version to KiCad 6 (5.99 Nightly) as it will be more convenient for future modifications especially for some specific plugins/features for RF stuff
• Removed the 50uH version with cleanup of the PCB
• Added full BOM (Work In Progress/To be checked/Optimized) with all parts which can generate a full BOM with KiCost

Best Regards,
Benjamin

[matbob]

Hello All,

Thanks to Jay_Diddy_B & Noy.

I have made these modifications to the layout:

1) Corrected the trace widths for 50 ohm impedance.
2) The spacing between +/GND and -/GND banana jacks has been changed to standard value of 0.75" (19.06 mm).
3) "JLCJLCJLCJLC" moved to bottom side of the PCB.

Regards,
Mathews

Edit: Replaced the 5uH_LISN.zip file. Originally had wrong Gerber files inside.