Author Topic: Adaptive bias for buffer  (Read 362 times)

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Offline promach

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Adaptive bias for buffer
« on: April 24, 2021, 02:20:06 am »
1.    May I know how X:1 exactly contributed to the adaptive bias ?
2.    How does the extra diode circled in red below help to improve transient response by using negative feedback mechanism ?
3.    How does using the extra diode worsen gain compared to using extra resistor ?
4.    Why would adding buffer MB introduce pole P3 ?
5.    What does it exactly mean by "zero from ESR" ?








 

Online magic

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Re: Adaptive bias for buffer
« Reply #1 on: April 24, 2021, 02:10:27 pm »
5. Output pole is cancelled when Cout impedance turns resistive and stops falling with frequency.
4. Finite output resistance of the buffer plus parasitic capacitance being driven, I suppose. Why wouldn't it?
3. Low dynamic resistance compared to a resistor?

I'm no CMOS LDO design wizard by any stretch of imagination, but it looks like they anticipate increased loop gain due to output device transconductance rising with increased load current (but not with decreased load resistance :-// as that would simultaneously reduce loop gain back to square one, methinks). So they mirror fraction of load current to the buffer to up its bandwidth.

Huh, if your professor says it works, who am I to disagree :-DD
 

Offline David Hess

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Re: Adaptive bias for buffer
« Reply #2 on: April 24, 2021, 05:58:06 pm »
That is a thing now?  I did it more than 20 years ago in bipolar common emitter rail-to-rail output stages to good effect.  Walter Jung showed an example of the same thing back in 2002.

Without the extra transistor, the output transistor gain is controlled by transconductance which changes significantly over the large signal output range which causes problems with the frequency compensation.  Adding the extra transistor as shown changes the output stage to a current mirror with a fixed current gain independent of transconductance of the output transistor.
 

Online magic

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Re: Adaptive bias for buffer
« Reply #3 on: April 24, 2021, 07:25:31 pm »
I don't think it's supposed to be new, looks like lecture slides to me.

BTW, gain of the output stage is indeed constant, but transconductance of the buffer is not, leading to overall bandwidth increase with load current.

(but not with decreased load resistance :-// as that would simultaneously reduce loop gain back to square one, methinks)
|O
Load resistance only matters for low frequency gain. At high frequency, Cload impedance is lower and dominates, of course. So load resistance is irrelevant.
« Last Edit: April 24, 2021, 07:27:19 pm by magic »
 

Offline David Hess

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Re: Adaptive bias for buffer
« Reply #4 on: April 24, 2021, 08:06:36 pm »
BTW, gain of the output stage is indeed constant, but transconductance of the buffer is not, leading to overall bandwidth increase with load current.

The closed loop gain does not change, but the gain of the output stage is proportional to the transconductance and proportional to the load impedance, so as the current increases, the increase in transconductance increases the gain.  Variation of gain within the feedback loop as the operating point changes leads to frequency compensation difficulties.  Common emitter/source output stages all have this problem to some extent and use a variety of methods to handle it.

I like the current mirror method but it seems more limited; it probably makes more sense for an IC than a discrete circuit but I have used it in discrete circuits with emitter degeneration.  All of the audio amplifiers I have studied with common emitter outputs use feedback within the output stage to control gain.

Common collector/drain output stages have a variation in output resistance with output current which causes the same problem but to a much lesser extent because their output impedance is lower.
« Last Edit: April 24, 2021, 08:16:32 pm by David Hess »
 
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Offline promach

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Re: Adaptive bias for buffer
« Reply #5 on: April 25, 2021, 11:31:33 am »
Quote
it looks like they anticipate increased loop gain due to output device transconductance rising with increased load current (but not with decreased load resistance :-// as that would simultaneously reduce loop gain back to square one, methinks). So they mirror fraction of load current to the buffer to up its bandwidth.

@magic : What do you exactly mean by they mirror fraction of load current to the buffer to up its bandwidth ?
 

Online magic

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Re: Adaptive bias for buffer
« Reply #6 on: April 25, 2021, 05:54:50 pm »
MBA and MTP are a current mirror. Okay, I described it backwards because technically it's the MBA current pulled by MB which is mirrored into the output by MTP, not vice-versa, but whatever. The effect is that a fraction of MTP current is fed by MBA into MB, so MB bias is proportional to load current.
 


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