Author Topic: 74HC40103 Counter Setup Question  (Read 793 times)

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Offline rcbuckTopic starter

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74HC40103 Counter Setup Question
« on: March 30, 2019, 08:13:52 pm »
Has anyone used the 74HC40103? I want to setup a divide by 200 counter. Looking at the timing diagrams and reading the description, I'm not sure how to use the PE pin. The timing diagram shows PE being pulsed low to load the count.

Can PE remain low at all times? The description says "When the PE input is low, data at the P0-P7 inputs are clocked into the counter on the next positive clock transition." This would seem to indicate the PE can't remain low since each clock pulse would just reload the PO-P7 value.

If that is the case, could I tie the TC pin to the PE pin. The TC pin remains low for one full clock period so PE would be low when the next positive clock pulse happened. Or maybe insert a single buffer between TC and PE and let the propagation delay of the buffer ensure PE is low when the positive clock pulse occurs?
 

Offline Deni

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Re: 74HC40103 Counter Setup Question
« Reply #1 on: March 30, 2019, 08:19:30 pm »
This should give you a hint...
 

Offline rcbuckTopic starter

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Re: 74HC40103 Counter Setup Question
« Reply #2 on: March 30, 2019, 08:58:20 pm »
Thanks Deni. I didn't notice that in the data sheet. I jumped directly from the Static Characteristics page to the package outline pages.  |O
 


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