Electronics > Projects, Designs, and Technical Stuff
74HC74 Power On Reset
(1/1)
German_EE:
In a 74HC74 dual d-type FF do the two flip flops always power up in the 'reset' state with notQ high or do I need to make use of the two reset pins and apply a short 0 pulse on power up?

Some experiments with an NXP part and a breadboard seem to indicate some form of reset mechanism but I am not sure here.
amyk:
Unless there is an explicit mention of a power-on-reset functionality, always assume that logic will power up in an undefined state.
Yansi:
No POR mechanism reset. use the asynchronous Set/Reset pins to init all flipflops to known states. (back in the days, chips like 7705 were used for this).
German_EE:
OK, thank you for confirming this. One trick I found years ago for a simple power on reset was to connect a 100n capacitor from the reset pin to ground, on power up it holds the reset pin low just long enough for it to be effective.
Navigation
Message Index
There was an error while thanking
Thanking...

Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod