Author Topic: SMPS layout question  (Read 769 times)

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Offline alank2Topic starter

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SMPS layout question
« on: August 16, 2019, 01:42:16 am »
Being too lazy to order and wait for a pcb, somehow I managed to solder together a SMPS today by soldering the parts directly to each other and using some pin leads here and there.  Once I figured out that I had to connect the output to the feedback pin even through it has a built in divider for the 3.3V output selection, it was working great.  I was quite impressed that not only does it startup positively even as low as 4V with no load, I could actually drop the voltage down to 3.6V and it was still holding the output.  Much better than the linear replacement block SMPS that I tried. 

http://www.ti.com/lit/ds/symlink/lmr16006y-q1.pdf

My question is about layout.  An example is given on page 15.

The ground pin (top center pin) is connected to the two ground via's under Cout.  Keeping the ground plane separate from the main ground plane is something that I've read is a good idea, but does it really need a ground plane under it at all?  What about a trace between the ground via's an cout ground side instead?  Would there be a problem of regular ground plane going under the SPMS then?  I hate the ground plane within a ground plane thing.
 

Offline alank2Topic starter

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Re: SMPS layout question
« Reply #1 on: August 16, 2019, 10:48:28 pm »
Any thoughts?
 

Offline T3sl4co1l

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Re: SMPS layout question
« Reply #2 on: August 16, 2019, 11:53:53 pm »
Where would you route the trace?

If it's going around the outside of Cin or Cout, you get extra stray inductance.  Which for something that's gotta be in the 10ns switching speed range, is a good way to introduce more noise to the regulator and surrounding circuit.

If you moved Cin where R1/R2 are, and connected them with a bottom side trace and vias instead (which is perfectly fine, the feedback path is low current, it doesn't need good layout), you can get a good low-impedance path for Vin.  You could swap Cout around as well, so now Vin, GND and Vout are on the top side.

The comment about where ground plane connects is kind of poorly phrased, but you want to connect where the three caps Cin1 and Cout2 (why is it Cin and Cin1, but Cout and Cout2?  Go figure..) are.  Noise currents from each cap are returned at this point, and a point is small so it doesn't have voltage drop across it, which means you avoid common mode noise this way.  This assumes no AC currents flow through Vin or Vout of course, which can be enforced by placing chokes here (small ones, under 1uH will be fine).

Again, to enforce the current balance at the common point, you don't actually want ground connected around the rest of this circuit.  So you could make a U-shaped slot in the ground pour to enforce this.  There may be some voltage across this slot (some fraction of the ground loop voltage within its perimeter), but it is relatively short, and so, unlikely to be a source of radiation; and also relatively easily damped or shielded at such frequencies (inches-long slot <--> ~low GHz).

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline alank2Topic starter

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Re: SMPS layout question
« Reply #3 on: August 17, 2019, 12:05:22 am »
Hi Tim,

I was thinking of just using a fat trace between the two ground points under Cout to the ground point by the IC GND, like 100mil or something.

I don't need R1/R2 because the IC I am looking at has a built in divider, but the VOUT must still be connected to the FB pin.

SO...

Q#1 - would a 100mil trace between the 3 ground via be decent, or should there really be a ground pour/plane under the entire SMPS connected to those via's?

Q#2 - if a 100mil trace is ok, would regular ground pour be ok in the area underneath the rest of the SMPS parts, or would this introduce noise into the main ground plane?

Q#3 - Unrelated to all of that, the device has a shutdown (the unused pin in their example) that shuts down at 1.23V.  I am planning on using this with 4xAA's (either Alkaline or NiMH), for the extra couple of resistors, should I implement the shutdown the load on the batteries when they fall below a certain threshold?  I've got a BOD on the AVR so I can make it shutdown when the output of the SMPS falls below 2.7V anyway, but I was thinking it could protect the batteries (especially NiMH) from being drained too much if someone leaves it on endlessly.  Worth implementing?  What voltage should I target for the 1.23V wirh the divider?  I know it starts up successfully at 4.0 volts and it seems like it can go down to 3.6V if started, but I don't have a precision supply driving it so my voltages might be off 0.1V or so.

Thanks Tim!
 

Offline T3sl4co1l

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Re: SMPS layout question
« Reply #4 on: August 17, 2019, 03:34:45 pm »
Q#1 - would a 100mil trace between the 3 ground via be decent, or should there really be a ground pour/plane under the entire SMPS connected to those via's?

I suppose.  But if you have pour anyway, why not use it?  I don't get it.


Quote
Q#2 - if a 100mil trace is ok, would regular ground pour be ok in the area underneath the rest of the SMPS parts, or would this introduce noise into the main ground plane?

So, they're both ground, but pouring over the trace is prohibited somehow? (By setting or by net bridge, say.)

The point is the ground plane serves to shield the loops it's under, so its presence reduces the inductance to Cin and around the output (which is already inductive due to the big stinking inductor connected there, but the shielding reduces emissions).

Can you not use an even wider trace, or another pour?  Or just slot the existing pour and be done?  Or place it in a corner?  I don't get it.


Quote
Q#3 - Unrelated to all of that, the device has a shutdown (the unused pin in their example) that shuts down at 1.23V.  I am planning on using this with 4xAA's (either Alkaline or NiMH), for the extra couple of resistors, should I implement the shutdown the load on the batteries when they fall below a certain threshold?  I've got a BOD on the AVR so I can make it shutdown when the output of the SMPS falls below 2.7V anyway, but I was thinking it could protect the batteries (especially NiMH) from being drained too much if someone leaves it on endlessly.  Worth implementing?  What voltage should I target for the 1.23V wirh the divider?  I know it starts up successfully at 4.0 volts and it seems like it can go down to 3.6V if started, but I don't have a precision supply driving it so my voltages might be off 0.1V or so.

Thanks Tim!

A buck for 3.3V, for 4xAAs, doesn't seem like the optimal choice.  They're nominal a bit over 6V but discharge cutoff is commonly accepted as 3V.  Which with the dropout I suppose would about meet the AVR's BOD, so that would be your stopping point anyway.

I suppose a SEPIC would be ideal -- allowing boost or buck operation, but it doesn't seem like it's so far off to be a problem.

How much current are you drawing, anyway?  Just an AVR?

Why not, say, a small lithium cell, that has the same or greater capacity, and just toss in a battery management / charger chip?  Or use removable cells and charge them externally (probably inconvenient if you're not using 18650s though).

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline alank2Topic starter

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Re: SMPS layout question
« Reply #5 on: August 17, 2019, 03:52:10 pm »
I'm not adverse to a pour under the entire SMPS if that is superior to just the trace I talked about.  It sounds like a pour that allows the SPMS to have its own ground under all of its components is ideal.

AVR with a HCMS 8 char LED display and microSD.  So far my current testing shows it averages 40-50mA, but I'm sure it has its spikes.

The 4xAA is somewhat designed to fit the rest of the "system" this belongs to.  it will be a floppy drive emulator on microsd for an Epson PX-8 vintage notebook.  Everything in the system uses 4 NiCD's.
 


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