EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: fyberlabs on January 05, 2015, 10:31:39 am
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Hi, I am working on an analog notch filter in SMD to a low Q Sallen-Key LPF that does Summing to shift the signal up from -3.3-3.3v to 0-3.3v. This is for a high impedance ECG sensor from Plessey.
I just wanted some sanity checking and advice. It is hard to get 1% capacitors and resistors, but I think I can get a 'good enough' design with 5% as necessary. As is I centered it around 55Hz as tolerance and drop at 50Hz and 60Hz is pretty significant. I have set the LPF at 1KHz and made it a 3rd order, though I might set it lower. I believe I am getting decent results with feedback from both sets of filters, so that worries me.
Anyway, attached is a picture of the design. The spice files are at https://github.com/FyberLabs/FlexModule/tree/master/sensors/ECGADCBuffer/notched/sims (https://github.com/FyberLabs/FlexModule/tree/master/sensors/ECGADCBuffer/notched/sims) . I welcome any advice on the design.
Thanks!
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Updated values after running more sims and tweaking values to more available components. All caps will have to be 10% and ceramic and resistors will be 5%, but 1% is order-able from factory. Repo updated and here is the new layout for the sim.