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| AD9288 ADC input voltage and input protection |
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| pro100vald:
Hello everyone! I`m designing a DIY data acquisition board for my hobby purposes. I`ve decided to use AD9288-40 as my ADC, and drive it`s inputs directly with AD8173 differential opamp, roughly like in the attachment. By datasheet, ADC needs a 1Vpp input signal, with common mode voltage of 0.3Vd. However, my analog frontend will have switchable ranges, and in current design Vpp can easily exceed 1V. As AD8173 opamp will have bipolar supply, it can easily drive one of it`s output to negative voltage, and exceed ADC`s absolute maximum inputs ratings. I could put diode protection on differential line, but it feels strange to me. Also, I can replace opamp`s negative supply with ground, but my frontend`s signal can get negative, and I`m afraid that opamp won`t handle it properly. So, what is the best practice to get around this issue? Datasheets: https://www.analog.com/media/en/technical-documentation/data-sheets/AD9288.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD8137.pdf |
| T3sl4co1l:
It's common to put some series resistance between the amp and the ADC, partly just for stability because the ADC is usually a modest capacitance, and prone to charge injection out the pins (which can upset the opamp, leading to slower settling, or offset). You could put schottky diodes in, to clamp the signals within the ADC rails. You may want the feedback resistors to pick up after the series resistors then, so that the diodes' leakage and capacitance is corrected by the loop. Mind the phase margin because this is adding an RC element to the loop, of course! Or you can put limiting before the amp, or as part of the amp using a video limiter amplifier. These are fairly uncommon, but they do exist (if not necessarily in the GBW you need here). The internal structure is several diffamp input stages tied at a common gain node, so that the main input operates most of the time, but the min and max inputs dominate (acting like a precision rectifier) when the gain node approaches the respective threshold. This has no integrator windup, it can be very fast. If you opt for passive diode limiting (like diode clamps before the amp), mind that this will greatly affect the linearity (distortion, IMD, IM3, whatever), and possibly bandwidth and recovery (due to nonlinear capacitance, or recovery if applicable) of your system. This may be acceptable for some purposes, but probably not for everything, so, YMMV. Tim |
| pro100vald:
Ok, thank you for advice! I have another rf noob question here: if I`m aiming to 20MHz maximum bandwidth, and I follow rf pcb design guidelines, should I be worried about pcb trace inductance/capacitance? Taking into account, that I don`t need fine precision and I`m aiming to use a regular double layer pcb with no impedance control. |
| T3sl4co1l:
Keep the trace length under (2e8 m/s) / (20MHz) / 10 or so, and lumped equivalent L/C will apply. Further, keep Zo = sqrt(L/C) near whatever the nominal system impedance is, and the impact of that L and/or C will be minimized. Mind that the op-amp may oscillate due to accidental resonator structures on pins -- keep supply bypass short, so that a possible 1/4 wave resonance is higher than GBW. Resonances can be dampened with ESR, and this is a good application for tantalum capacitors (or ceramics with added resistors), or ferrite beads (preferably both :) ). So that's another thing that series resistance helps with. There isn't really a "system impedance" between the op-amp and ADC. The impedance is simply whatever the two devices have, plus the traces between them. The op-amp is probably somewhat inductive, and the ADC somewhat capacitive (this combination, plus a bit of excess phase shift in the amp's internal circuitry, is why C-loaded amps tend to ring, and why they can oscillate with particularly poor loads). This implies a cutoff frequency and resonant impedance, which implies that using R = sqrt(L/C) in series will stabilize that impedance, damping the resonance without too much cost to rise time or settling time. And with a resistance, you have a better starting point from which to reason about the effects of L and C; it's not quite a system impedance as such, but it's something. In practice, you'll probably have so little distance between the amp and ADC that analysis is hardly significant, and the amp and ADC port impedances utterly dominate. Concentrate more on maintaining solid ground throughout the circuit, using stitched pours, and placing bypass capacitors nearby, with adequate ESR to prevent resonances there. Tim |
| ogden:
--- Quote from: pro100vald on April 16, 2019, 11:21:23 am ---By datasheet, ADC needs a 1Vpp input signal, with common mode voltage of 0.3Vd. However, my analog frontend will have switchable ranges, and in current design Vpp can easily exceed 1V. As AD8173 opamp will have bipolar supply, it can easily drive one of it`s output to negative voltage, and exceed ADC`s absolute maximum inputs ratings. --- End quote --- I would just use single supply buffer amplifier. Further reading: ADC buffering cookbook from TI, http://www.ti.com/lit/an/sloa098/sloa098.pdf |
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