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ADC and serial circuit improvement advice
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blazini36:
I've been whipping up some prototype circuits for an FPGA dev board I've been working with. One is using resistor dividers to scale the expected input voltage to the 4.095 volt input range for a 12bit ADC. The other is an RS 422 transceiver circuit. I'm no Electronics wiz but for the most part these seem to work well but could use some improvement.

The ADC circuit works well, the scaling is good for 4 channels to receive a 0-5v input range and the other 4 channels to receive 0-10v. The only issue I have here is noise, the resistor dividers make the inputs quite noisy. I can mitigate this in software with a time based filter but if I can get things a bit better on the board. Are caps between the voltage divider and ADC inputs the way to go? A cap on each ADC channel is a bit of an annoyance plus I'm a bit worried about slowing down the rate of change, but if it's the way to go it's the way to go.

The other is an RS422 differential transceiver connected to 2 FPGA pins. I can't do well to test this in place at the moment because there is firmware issues with the RS422 portion of the FPGA programming, I do want to get it right on the next prototype PCB though. Biggest thing I'm concerned with at the moment is the transistor used as a level shifter on the Rx output. VCC to the transceiver is 5v for 5v outputs on the Tx output but the RX output to the FPGA needs to be level shifted down to 3.3v for the FPGA pin tolerance. Just curious if this is implemented correctly.
iMo:
What ADC do you use there?
David Hess:
Real world signals tend to be pretty noisy so the noise from the input attenuator is usually insignificant.  Settling time can be an issue depending on desired resolution.

Often the input is integrated over a whole number of power line cycles to reject power line noise which limits the sample rate to 50 or 60 Hz maximum and this can be used to select an RC time constant for input filtering.  Higher speed systems use lower impedances and shielded cables.
blazini36:

--- Quote from: imo on August 17, 2019, 05:30:11 pm ---What ADC do you use there?

--- End quote ---

The dev board is a DE10 nano which uses a LTC2308 according to the datasheet
iMo:
Since it is a 12bit ADC only, the 10k/15k resistors (their thermal noise contribution could be something like 14uV rms in the 500kHz BW, while ADC's 1LSB=610uV) do not contribute to the noise much, imho.
Most probably it is the grounding of the dividers generating the noise, or something like that (generally wiring - ie. no "star" gnd configuration, long wires, loops, etc.)..
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