Adding simple current limit on generic switchmode reg

[Psi]

Schematic?
Tim

This is where the schematic is at now.

I've not yet figured out the best way to add the other opamp into the current regulation.

I don't plan to use a TL072, it was just what i had laying around to play with.

[T3sl4co1l]

Yeh well LM358 would do more than TL072, the latter simply does not pull down low enough at all.  Not that the slowness of the former would do much better, but maybe it would at least run..  heh, hmm.

Have you tried just biasing up ISENSE, say 10k to VREF?  That halves the range needed by the shunt resistor.  Also, this is CCM isn't it?  Those inductors look rather large, 22uH 8A, that's the DC rating right?  So more than that, you require slope compensation: put an NPN emitter follower on the RtCt pin, and run about 3.3k from emitter to ISENSE.  This both biases up ISENSE in the same way, and adds timing ramp to it, making it stable down to, some modest amount of ripple, say 50%.

Note that this restricts the range of ISENSE --> range of COMP, so the compensation components may need to change (larger C, smaller R).

Oh what the hell, R13 is in the wrong place again, you looked up the wrong... well, there are a LOT of wrong references out there, sadly... it's not your fault.  This basically sets it to gain ~67 so the regulation is poor.  Easier to compensate, yes, but is that worth the cost?  Best is R+C in series, between COMP and FB.  I'd suggest starting with 10k and 10nF, and adjust from there to get reasonable step response.  Hardly matters anyway, really, as long as it's stable at idle and with a battery attached; it can be maddeningly slow and still more than fine for charging!

As for CS amps, note you can use 5V compatible devices from VREF, or 12V from VCC.  You need >20MHz GBW, and "single supply" (input and output range includes GND) or RRIO type.  I don't recall what I used last time I needed something exactly like this; would have to go shopping.

Similarly for ISENSE, R1/Q4 can be tweaked by biasing the base down a bit; you've already got R5 there, a little resistance from base to GND would do.  Note this makes the bias dependent on VOUT -- a foldback current limiter.  For regulated VOUT, this will be fine, but if you prefer more stability/precision, use three resistors, a diode and NPN to make a CCS.

Also, consider turning up the LM317 a couple volts, it's at 8.52 as shown.  10 would be better.  Could also use a zener clamp + depletion MOS (source follower), just crude voltage limiting is all that's needed.  Actually, is LM317 cheaper than a DMOS?  Haven't checked... probably is, too.

Hmm, the reverse protection thing might not turn on at idle.  Which would be a bit frustrating as a power supply, but, arguably a safety feature for charging?  To better enforce this, maybe add a B-E resistor to Q6 -- this gives a leakage path through Q2 (consider both capacitance and leakage) so it can start off (notice this is a flip-flop configuration, so it latches on once started).  You might also have something that turns it off later, once current goes to zero (and which itself must stay latched until output goes to zero i.e. the battery is disconnected, or, to be a bit more subtle about it, and useful: until battery voltage drops below charging threshold, where it will start back up again).  The disable can also force off the controller (pull COMP to GND; it'll still be drawing some ~mA supply current, it doesn't have a proper power-down unfortunately).

Hmm still not quite everything there, would have to be.. stays latched until below charging threshold (battery still connected), or voltage goes to zero and then back up -- showing that a battery was disconnected and reconnected.  So there's more than just two nodes in the state diagram, and the transitions between them need to be correct... the kind of thing that starts to get a bit of a pain to do in discrete logic -- not that it's infeasible, but it's starting to get just a little bit complicated, and honestly might be worthwhile to add an MCU.  Or charge controller IC proper.

Cheers!

Tim

[Psi]

So, I'm back on this project.

Currently I seem to have hit a wall at 82% efficiency.
Input 12.55V @ 2.42A
Output 13.1V @ 1.9A

Any ideas how I can improve it more.
The 2512 Isense resistor R122 gets to 110Deg C which is bit hot for my liking.

I have the aforementioned emitter follower on the RtCt pin for some slope comp and to try reduce the waste heat in R122.
But anything under about 100mR for R122 Isense and it starts to go unstable and efficiency falls. See scope images.

Any ideas?

[Psi]

I'm beginning to wonder if i should start again with something like the LM5158-Q
It runs at around 2mhz 90% efficiency with built in switcher and isense.
Would just need to add the same output current limiter and it should work.

[T3sl4co1l]

Looks fine.

I mean, it's bouncing around, but in a usual way.

Again, R122 can be reduced further by biasing Isense up: whether by introducing still more slope comp (maybe not desirable, you should really only use what you need -- lest startup/SC/fault current limit get too sloppy), or a resistor from VREF to Isense.

The second waveform just has poor compensation.  Check COMP node, it'll be wobbling around following the peak envelope of Isense (or rather, the latter is a consequence of the former).  Adjust C10, R13, and, are you sure a single 10uF (C11) is enough at the output?  Also, what load is this with?  Stability will be very different with a resistor, CCS or battery load.

Also notice compensation will be different in current limit mode, because Q4 has quite high gain.  Consider giving it a series emitter resistor, maybe an R+C across it C to B.  (R10 might seem somewhat redundant in that case, but leave it in, it's necessary to give some voltage swing for the R+C to provide feedback!)

Oh hm, C2 an electrolytic, for damping I would suppose?  It won't do much at equal value to C3; more like 47uF+ should do nicely though.  (May want an LC filter too, to reduce emissions?)

Tim

[Psi]

Thanks Tim,

Will have a play with those suggestions and see how things improve.

Normally the isense system runs at 1V, what's the largest practical offset that can be
obtained to lower the resistor value?  My inductors saturate at 10A which would normally warrant a 100mR resistor.  Is 50, 25, 10mR doable?


I just need to get the temps down a bit, maybe do little more stability testing, then I'll probably add a NTC to gently pull up the feedback if the PCB gets too hot and should be good to go,

[T3sl4co1l]

Limited by offset and speed... which "helpfully" they don't provide, so, a few hundred mV is probably about it.  They do give a range 0.9-1.1V for maximum threshold, which seems to suggest biasing it above 0.9V peak (maximum DC + slope comp) might not work.  Also means, at say 800mV peak, the variation from unit to unit might be 100mV-300mV, which is again pretty loose (on top of slope comp's effect).

If you need more, a newer controller can be chosen, or a current transformer or sense amp used to increase the scale a bit.

Tim

[Psi]

Quick question.

Are there any issues using a 10k NTC + trimming resistor between UC3843 COMP and GND to add some basic thermal protection to lower the output current as the PCB gets hotter.

I did some tests with a 10k NTC and 1.8k resistor and it seems to work quite well.
Doesn't appear to affect the output current until around 60C then it starts scaling back to around 50% at 90C.

Are there any issues doing a crude thermal limit this way?  I don't need anything super accurate, but if I can reduce output current above 70C that will help in situations where the device maybe used on a hot summer day where the typical output current is probably a little high and would otherwise cause higher than ideal operating temps.

I know from the DS that pulling COMP to GND is an acceptable way to shut down the IC.
So it all seems ok to me?

Edit: Seems like current ramp down with temp is less at higher input voltages, so that is one downside.
(I only need to deal with 12V and 24V systems so I can add a NPN to short out the NTC trim resistor to GND and increase sensitivity at 24V)

[T3sl4co1l]

Probably better to do hysteresis: add a comparator (LM321?) and pull ISENSE high (>1V) to force off.

I think shunting most pins will do something (pulling COMP to zero, or RtCt as well), but the flip-flop is reset-dominant so forcing ISENSE guarantees the output off most solidly (and quickly).

I don't like forcing COMP because it's not rated for max current sink/source.  It's probably hFE limited, highly variable across manufacturing and temperature ranges.  It's probably not as strong as most op-amps, let alone transistors if you want to put in a couple mA base current or use a 2N7002 or bigger, but an alternative is preferable.

Forcing RtCt is kind of cute, as holding it low prevents the oscillator from triggering a new cycle.  You could use this if you prefer whole cycles i.e. it will never be turned off in the middle of a pulse.

Tim

[glentek]

Old thread I know, but your original question on adding a current limit to a SMPS - I have done this to an off the shelf 600W 36V supply. I have it set to limit at 12A and it quite happily supplied a load for 3 hours with minimal heating.

[Psi]

I was playing with the idea of not having any current limit but instead just a thermal limit of around 70C.
There's already a mosfet current limit as part of the UC3843 and being SEPIC it's not going to care all that much if the output is shorted.
So a thermal limit will limit the output current to keep the board at an acceptable temp.
And for this kind of system no hysteresis maybe better?

I will have a play using RtCt, as that might be better than COMP.

[T3sl4co1l]

It's interesting at least, in this case, just charging slower -- well, it doesn't really matter whether it's PWM'd (hysteretic) or throttled to the battery.  Whereas a general power supply, hysteresis is preferred -- it should either work, or not, and partial operation may cause unexpected malfunction, and better to signal malfunction in the clearest (on/off) way possible.

So, I don't mind either way.

Tim

[Psi]

Yeah, the one thing I do need to address is in the unlikely situation of a load that draws huge current at say 3V, the current maybe too high for the rectification diode to handle.   If the diode gets hot that will heat up the PCB and scale back the output, but if the diode is passing more than its max rated current for even a very short time it may get damaged regardless.

For a 12V battery charger this is pretty unlikely situation. Worst case is probably just 1 shorted cell so 10V SLA load.

Might just have to spec a 20A diode and be done with it.

[Psi]

Is it normal to get ringing across the mosfet Isense resistor at turn on which indicates current peaks of over 90A?

I can see ringing that peaks around 650mV. The Isense resistor is 7mR.   Ringing is around 50mhz lasting around 30ns
(The 7mR sense is going through opamp before UC3843 to restore expected voltage range)

hm. wonder if I just need a faster opamp. Current one is 20mhz TSV992IDT but i do have a TLV3541IDR around here somewhere (200mhz)

[T3sl4co1l]

Maybe?

Turn-on corresponds to diode ringing, maybe put an RC there.  Or slow turn-on by using a R || D gate network.

Usually just a turn-on blip due to gate charge and diode/secondary capacitance,



Though this one is exaggerated because of a fairly small shunt resistor.

What was layout again?

Tim

[Psi]

My concern is mainly the mosfet. It's a 15A mosfet 50A peak

Attached image of PCB loop for each inductor in green and coupling in purple.
The inductor foot prints are a little larger on this pcb than they need to be, i wanted to keep options open for testing larger ones.
But there doesn't seem to be much difference in heat with larger 14mR vs smaller 40mR so will probably go with smaller one and
shrink the loop a little.

Bottom graphs are probing across the 7mR Isense resistor using spring round clip.

[Psi]

Follow up, actually its not as bad as I thought.

I had the probe across the resistor's pads on the pcb, but i moved them to right on the top of the 7mR resistor package itself as close as physically possible and it dropped from ~600mV to 240mV.  So 0.24/0.007 = 34A which is more reasonable.

Damn pcb track resistance is so close to the resistor, hehe
I knew this, just forgot.


Also, i noticed in my view of each cycle graph above, the waveform is inverted. So this ringing is negative a lot more than positive.
So is happening at switch off. Must just be inductive kickback from the PCB track current flow?

[T3sl4co1l]

Reactance dominates at these frequencies.  You're measuring peaks with frequency content of 10s of MHz.  The chip resistor itself will have say 2-5nH (what size is it?) or 0.12 ohms already at 10MHz.  Worse still if your probe ground is picking up some common mode.  So that's why I asked about layout.

The best way to compensate for inductance is to apply a square wave (can you maybe set up a toy switching scenario with a resistive load and hard-wired pulse width?), and add an R+C after the sense resistor and adjust the value until the measured wave is square.

Another way is to put an inverse loop in series with the probe connection, coupled to the inductance of the resistor itself.  This looks like this:



This is a parallel array of STP50N06s with a 10mΩ sense resistor in series at the bottom (source to GND), which I use for pulsing high-current loads, hence all the caps off to the side).  The black wire at the bottom-right is a coax output to the scope.  The blue wire connects to the "hot" end of the resistor, and loops around twice, backwards, where the resistor (one of those metal strip types) loops around once.  This compensation winding only needs one turn if perfectly coupled, but that's impossible, so two turns with weak coupling (evidently k = 0.5) does the trick.  Here, the turns are positioned until a square wave is measured.  (Confusion is avoided by using a load resistance -- which will inevitably have some inductance itself at these impedances -- with a different time constant than the sense resistor. The leading edge might be rounded over, but the rounding/overshoot being adjusted by the wire position is at a different rate, so is easily visually separable, and so an accurate calibration can be made.)

You wouldn't be able to stuff a winding under that resistor, but an RC network does the same thing.  Specifically, the L/R time constant of the resistor must be matched by the RC time constant of the filter, and that will give a flat frequency response.

Tim