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Analog switch: With separate substrate, what potential is the D-S circuit at?
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741:
I've been reading MT-088 "Analog Switches and Multiplexers Basics". This shows separate source & substrate connections. The paper states
--- Quote ---...A dielectrically-isolated family of these parts introduced in 1976 allowed input overvoltages of ± 25 V (beyond the supply rails) and was insensitive to latch-up...MOSFET transistors are bilateral. That is, they can switch positive and negative voltages and conduct positive and negative currents with equal ease. A MOSFET transistor has a voltage controlled resistance which varies nonlinearly with signal voltage Connecting the PMOS and NMOS devices in parallel forms the basic bilateral CMOS switch of Figure 2. This combination reduces the on-resistance, and also produces a resistance which varies much less with signal voltage.
--- End quote ---
Given the above, and thinking only about the NMOS half of the switch, then when the device is ON, the substrate is at -15V and the gate at "Vdd" (say +15v). The channel is "inverted" and acts as a resistor.
Suppose we explicity reference Vds to substrate by using a wire link from substrate to source. Then I would expect the usual limits about Vd to apply: I cannot allow Vd to be above one Vthreshold of VGate.
Now, suppose we again disconnect source from substrate and apply a "floating" 1v5 coin cell (positive to drain, negative to source), and assume the resulting current is within safe limits. We have forced
Vd > Vs
but where does that entire voltage span (Vs...Vd) lie WRT substrate? We have not explicity made any effort to reference it to VGS in any way. Thus, I do not understand whether there would be a Vds limit (due to channel pinch-off).
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