Author Topic: Anything wrong with this linear PSU design? (now selecting parts)  (Read 33980 times)

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Offline pitagoras

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Re: Anything wrong with this linear PSU design?
« Reply #25 on: January 03, 2017, 05:37:45 am »
Thanks for sharing.
I design myself a LAB PSU, took a look to Tek P501 too and a couple of other similar designs.
Additionally this Linear AN (http://cds.linear.com/docs/en/application-note/an32f.pdf) is interesting because adds
1) Stepping down the input DC so the dissipation at the linear regulator is low
2) Strategies for lowering the dropout voltage
3) The CC feedback acts on the CV input
4) Uses MOSFET for output
 

Online David Hess

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Re: Anything wrong with this linear PSU design?
« Reply #26 on: January 03, 2017, 07:20:39 am »
Quote
Do not use the LT1037; it is decompensated for use at gains of 5 or greater.  While it is possible to externally compensate it for lower loop gain with a series RC network between the inputs, this will result in higher noise than using an LT1007 because you have to raise its noise gain to make it stable and it adds complication.

I won't! I knew it wouldn't be stable but I wanted to see if adding the compensation capacitors that were in Kleinstein's design would work. It didn't. :( The LT1007 was easier to stabilize but with my current design the LT1007 would require a negative auxiliary, due to common mode input and output limitations.

Usually the frequency compensation can be brute forced by adding a capacitor from the output to the inverting input but with a decompensated amplifier like the LT1037 or OP37, this will just make the operational amplifier oscillate.  Stabilizing one of these below their minimum stable gain is a great learning experience.

And of course you cannot add a feedback capacitor between the output and inverting input of a current feedback amplifier either unless you sacrifice a goat, say the magic words, and know the secret circuit.  Or maybe it was just that last thing.

Quote
I think I am going to change around my design radically, to move the current shunt to the low side and enable the use of a wider range of op amps. I have a whole bunch of op amps, mostly LM324's, but some really nice LT parts as well. Almost none of them are rail to rail input/output, so I prefer my design to use junk I already have: (bolded ones are ones I may consider using.)

This is a good idea if you have no specific requirement for high side current sensing.  It makes things easier but see below about the PS503.

There are some old operational amplifiers like the 301A and some JFET input operational amplifiers which have a common mode range which includes their positive supply making them useful for high side current sensing.  I always wished that someone had made a 324/358 equivalent for high side single supply applications with an output that goes to the positive rail but nobody ever did.

Quote
LM324; // slow, crossover distortion issues, but I have a bunch
LM741; // ancient relics of the past, I literally have handfuls of them!
UA1458TC // ancient relics of the past, I have a bunch of these!

Personally I do not think there is anything wrong with these for this circuit.  Their low slew rate will increase recovery time but in a general purpose bench supply they are still fast enough.  If I wanted faster recovery time, then I would add clamping circuits to keep the error amplifiers out of saturation.

The 1458 is effectively a dual 741 and depending on who made them, they are identical.  The 4136 was often used as a quad 741 but it is a different part with PNP inputs and faster performance.

It is difficult to beat the price of the 741 or 1458 if their performance is sufficient.

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LM318H; // it's in a fancy metal case :D

The 318 is fast and supports external frequency compensation but has more noise and less precision because of the resistors used for input stage Gm reduction.  The 318 was one of the first parts useful in video applications.

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TL072CP; // JFET inputs, limited output current and the output can't go below the noninverting input.
TL2072AC; // ditto.

The higher slew rate allowed by the JFET input stage (Gm reduction again) would make recovery time faster.  I am not sure what you mean about the output not going below the non-inverting input; are you referring to the phase inversion issue with the TL072 type JFET operational amplifiers when their (negative?) input common mode range is exceeded?

Quote
OP37; // These things aren't even that fast and can't work at unity gain.
OP27; // ditto
LT1007; low noise, moderatly fast

The OP37 is a decompensated OP27 just like the LT1037 is a decompensated LT1007.  I have used the OP27 and LT1007 to great effect for high performance low noise regulators and power supplies but their capabilities are generally wasted on a bench supply.

If you want extra precision at a low cost, then use a cheap OP-07 instead or the LT1112s that you have.

Quote
LT1167;
LT1191;
LT1363; CRAZY fast, 1000V/uS!!! Maybe too fast... Not even going to try to calm it down and stabilize it!
LT1360; fast!! 800V/uS!!!
LT1112;

You kids with your fancy complementary process operational amplifiers - get off my lawn!

LT1167 - too slow for current sensing.
LT1191 - fast VFA and could be useful but not as an error amplifier.
LT1363 - fast CFA and could be useful but not as an error amplifier.
LT1360 - fast VFA and could be more useful than LT1191 but not as an error amplifier.
LT1112 - can be treated as a very high performance replacement for the 1458 or a better dual OP07.  This would be a great error amplifier if you want maximum precision with parts that you already have.

Watch out for the maximum differential input voltage and current for precision amplifiers including the OP07, LT1007, and LT1112.  Unlike 741 and 324 type operational amplifiers, they have a very limited differential input range and require input resistors to protect their inputs from excessive currents.

Hmm, does anybody make a wide differential input precision operational amplifier except for the LT1006/LT1013/LT1014 type?  I guess it is time to start a search but I bet the part will be too expensive if it exists.

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That is a great design and reminiscent of the Tektronix PS501 or PS503.

Thanks! :) I took a look at the manual for the PS501 and I see what you mean.

The PS503 had to use high side current sensing because it can operate as a bipolar tracking supply.  These power supplies also support remote programming.

I would not copy these designs exactly but the way they handle current control is worth studying.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #27 on: January 03, 2017, 05:42:45 pm »
OK, I got my new design, moved the current shunt to the low side, and the ground is taken to be the low side output. I am using the same basic technique for current sense, and due to op amp action, the inverting and noninverting inputs are essentially equal, and since the noninverting end is almost directly connected to ground, it becomes trivial to set both the voltage and the current (using a basic much cheaper voltage output 2 channel DAC)! Which is my favorite part of this new design!!!  ;D  ;D ;D In comparison, the old design would have required a DAC with a current output and be capable of sinking current a few volts below ground for accurate current set.

I used LT1007 in this design, and I was able to get the LT1037 stable in it as well, although it required more capacitance between the output and inverting input. I don't like that form of compensation because it is essentially slowing the op amp down, reducing bandwidth. I figure the LT1007 is better suited. Because the LT1007 is a basic single op amp package, and with a negative auxiliary voltage rail, it should be easy to substitute almost any op amp (like the classic UA741 / LM741, something I may indeed try!) and see what the performance of the supply will be.

BTW, why hasn't Dave made video #741 yet!?!? Stop slackin' dave  ;)

My second favorite part of this design is the implementation of a few transistors, Q5 and Q6, which safely clamp the output of the op amps to Vbe above the "controlling" op amp, by establishing redundant feedback. Of course you can leave Q5 and Q6 and the base resistors out of the circuit but the transition between CV and CC will be slower. For a few extra pennies I think they are well worth it!




Schematic Notes:

Of course the rounded corners are necessary! :-+ We can't have the electrons flying of the edges!  :o  ;D

D2 will be replaced with a beefy rectifier diode in the PCB layout, I used a 1N5817 in inverse-parallel to the constant current supply to better simulate a real CC source. It's not perfect, as the minimum output voltage is -100mV instead of a few hundred millivolts above ground. I might use the LM334 to replace that. I didn't bother importing the LM334 into this design.

The PNP pass transistor will be an MJE2955, possibly a few in parallel (with appropriate current sharing resistors, of course!) depending on how well the thing handles 5A draw.

I forgot to include a way to measure CC/CV mode. I might just whack in a comparator to compare the output of each error amp. The schematic is starting to get a bit messy, is there anything I can do to simplify it?
« Last Edit: January 03, 2017, 05:50:13 pm by Powermax »
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #28 on: January 03, 2017, 06:17:27 pm »
I have added that comparator into the design, and also cleaned up the naming of the resistors a bit. R1 through 4 help set CC and CV, Rload and Rshunt are fairly obvious, R5 through 7 set the current source, R9 - 10 limit base current for the PNP transistors, R11 and up are for compensation and input protection. I tried to number them based on purpose.

The comparator U3 will not be a $$$ LT component, I just don't have libraries installed in LTspice for any other devices This will almost surely be a 741. The output will drive an arduino and/or some LEDs.

I have also attached the .ASC text file for this supply below. You can easily download it and modify it freely in xxxSpice.
« Last Edit: January 03, 2017, 06:36:28 pm by Powermax »
 

Offline ZeTeX

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Re: Anything wrong with this linear PSU design?
« Reply #29 on: January 03, 2017, 06:27:37 pm »
I have added that comparator into the design, and also cleaned up the naming of the resistors a bit. R1 through 4 help set CC and CV, Rload and Rshunt are fairly obvious, R5 through 7 set the current source, R9 - 10 limit base current for the PNP transistors, R11 and up are for compensation and input protection. I tried to number them based on purpose.

The comparator U3 will not be a $$$ LT component, I just don't have libraries installed in LTspice for any other devices This will almost surely be a 741. The output will drive an arduino and/or some LEDs.
Nice, can you upload *.asc file? also did you choose C1 & C13, C5 & R14 by brute force or actually did a proper simulation?
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #30 on: January 03, 2017, 06:38:15 pm »
Yup! I just modified the last post to include the .ASC file. I got the values by guessing, since I don't know how to select the values properly. I tried using the minimum value for C's and maximum value for R's that ensured stability.
 

Offline ZeTeX

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Re: Anything wrong with this linear PSU design?
« Reply #31 on: January 03, 2017, 06:45:40 pm »
I got the values by guessing, since I don't know how to select the values properly. I tried using the minimum value for C's and maximum value for R's that ensured stability.
Thanks for including *.asc!
I'm afraid guessing the value might still make the power supply unstable, lets hope that it doesn't happen. I also want to build micro-controller controlled mini PSU and your schematics seems to be going good, most likely I will use it with a few modification.
also the curves on the schematic are kinda funny, what's the reason? at the end you are going to need to draw the schematic in real schematic +pcb software if you want to etch your own PCB or order one.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #32 on: January 03, 2017, 07:05:42 pm »
I just did that for shits and giggles!  :-DD I think it makes the schematic more readable as well.
 

Online David Hess

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Re: Anything wrong with this linear PSU design?
« Reply #33 on: January 03, 2017, 08:18:21 pm »
The Tektronix PS501 and PS503 designs use an LED in series with the output of the current error amplifier to indicate when current limiting is in effect.  This works well but LEDs are fragile and if the LED fails open, then the current control loop fails to operate.  An optocoupler could be used in place of the LED for detecting the operating mode.

My solution is similar but I place a PNP emitter follower at the output of each error amplifier and bring the collectors to the negative bias supply.  The emitter followers unload the operational amplifier outputs preserving their precision at the cost of another 0.6 volts of voltage drop (the diodes are still needed if the amplifier outputs are not clamped to prevent reverse Vbe breakdown) and the collector currents can either drive voltage and current mode indicator LEDs or the collector currents can be detected to indicate mode.  Older designs used p-channel JFETs instead of a PNP transistors.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #34 on: January 03, 2017, 08:33:57 pm »
The Tektronix PS501 and PS503 designs use an LED in series with the output of the current error amplifier to indicate when current limiting is in effect.  This works well but LEDs are fragile and if the LED fails open, then the current control loop fails to operate.  An optocoupler could be used in place of the LED for detecting the operating mode.

My solution is similar but I place a PNP emitter follower at the output of each error amplifier and bring the collectors to the negative bias supply.  The emitter followers unload the operational amplifier outputs preserving their precision at the cost of another 0.6 volts of voltage drop (the diodes are still needed if the amplifier outputs are not clamped to prevent reverse Vbe breakdown) and the collector currents can either drive voltage and current mode indicator LEDs or the collector currents can be detected to indicate mode.  Older designs used p-channel JFETs instead of a PNP transistors.

I think the problem with that idea is that if current limiting occurs at Vout = 13V or higher, (suppose a 5 ohm resistor at 2.7A current limit? Vout = 13.5V) then the output of the op amp will be pretty high, around 14 or 16V depending on the diode and pass transistor chosen, there may not exist enough voltage to power an LED, it's brightness may become roughly dependant on output voltage. That is why I used an additional comparator (well, a lousy 741, anyway.)
 

Offline VEGETA

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Re: Anything wrong with this linear PSU design?
« Reply #35 on: January 03, 2017, 08:39:10 pm »
can your supply achieve 1v dropout or less? can it work with mosfets or how to make it better in terms of efficiency?

thanks

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #36 on: January 03, 2017, 10:00:06 pm »
Quote
can your supply achieve 1v dropout or less? can it work with mosfets or how to make it better in terms of efficiency? thanks

Since I'm that was asking about if the design is even any good, (I have not even breadboard-tested my latest revision yet!) I might not be the best resource to you, but I will try:

The efficiency of any (including this) linear regulator is very straightforward, it's just the input voltage divided by the output voltage. Power dissipated is the difference in the input and output voltage, multiplied by the current going into (or out of) the linear regulator design. It more-or-less doesn't matter what type of transistors you choose for the pass element, the power dissipated will always be voltage * current. I should note that those calculations are a bit oversimplified in regard that it ignores quiescent current draw which actually means more current flows "into" the design versis out. And so that is accurate when actually powering a moderate to large load which draws considerably more than the quiescent current draw of all the regulator components (error amps, LEDs, etc.) You should add in a few ten's of mA's times the input voltage (from 18V to -5V!) as part of the efficiency calculation for a more accurate calculation.

I plan on using an 18V center tapped transformer for this design, and the "+18V" rail feeding directly into the collector of the complementary pair pass transistor will be switchable between 9V and 18V. Because the op amps and all the regulator circuitry will be hard-wired to the highest voltage rail, this means that if I set the output at 9V, I can set my transformer tap to "9V" (which will realistically be (sqrt(2)*9-1.2) volts = 11.5V average at low load) then I can have a very small voltage drop across the Sziklai pair (maybe 900mV or even less) as it saturates due to the base voltage being potentially higher than the collector.

With my design, I expect the maximum power dissipation to be approximately (((9 × sqrt(2)) - 2)Vin - 0 Vout)*5A ? 55W power dissipation. Not too bad! I small CPU heatsink can easily tolerate that, possibly without active cooling! And since some of that power is dissipated in the shunt resistor (about 2.5W max) the transistor shouldn't ever see much more than 50W dissipation.

As for the dropout voltage, I choose to use a Sziklai pair for the output. These may be difficult to stabilize in some cases, but I personally have not had much trouble with them, at least not much more than a discrete darlington arrangement. (I'm actually quite fond of that arrangement! Nearly all the advantages of darlingtons it only requires 0.6v for "Vbe.") My hard-wired circuit was able to achieve 2V dropout at 3A when using a 2N2955 & 2N4401, versis 5V at 3A with a MJE3055 & 2N4401 darlington arrangement.

I like BJTs more than MOSFETs, even though I know darn good and well that MOSFETs >> BJTs in many designs and applications. Also since I didn't have high power MOSFETs on hand so I choose to go 100% oldschool BJT.
« Last Edit: January 03, 2017, 10:04:50 pm by Powermax »
 

Offline pitagoras

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Re: Anything wrong with this linear PSU design?
« Reply #37 on: January 03, 2017, 10:04:07 pm »
If you add a simple DC-DC switching converter at the input, controlled by the regulated voltage, you can reduce voltage drop, and thus dissipation, a lot.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #38 on: January 03, 2017, 10:12:34 pm »
If you add a simple DC-DC switching converter at the input, controlled by the regulated voltage, you can reduce voltage drop, and thus dissipation, a lot.

Yup, a switching preregulator. This can be configured to "follow" the output, so as the output voltage changes, so does the output of the pre-reg. However, since the output can change quite fast (as the case when going from CC to CV), I am not sure if a preregulator will be capable of rapid changes to output voltage. It would require a surge of current to quickly charge the filter capacitors of the pre-reg.

Also, I am unsure how good the line regulation of my design is, I don't know how to test it properly. Given that I will probably end up using "slow" op amps in the end (I have a bunch of 741's to burn! :) ), I can only assume this supply will do a terrible job of rejecting high frequency ripple and noise. I prefer to use a transformer with many taps, or even just one single voltage and a reduction in current with reduction in output voltage. (maximum current set as a function of the output voltage) That way I never dissipate over 70W.
 

Offline ZeTeX

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Re: Anything wrong with this linear PSU design?
« Reply #39 on: January 03, 2017, 10:17:04 pm »
Quote
can your supply achieve 1v dropout or less? can it work with mosfets or how to make it better in terms of efficiency? thanks

Since I'm that was asking about if the design is even any good, (I have not even breadboard-tested my latest revision yet!) I might not be the best resource to you, but I will try:

The efficiency of any (including this) linear regulator is very straightforward, it's just the input voltage divided by the output voltage. Power dissipated is the difference in the input and output voltage, multiplied by the current going into (or out of) the linear regulator design. It more-or-less doesn't matter what type of transistors you choose for the pass element, the power dissipated will always be voltage * current. I should note that those calculations are a bit oversimplified in regard that it ignores quiescent current draw which actually means more current flows "into" the design versis out. And so that is accurate when actually powering a moderate to large load which draws considerably more than the quiescent current draw of all the regulator components (error amps, LEDs, etc.) You should add in a few ten's of mA's times the input voltage (from 18V to -5V!) as part of the efficiency calculation for a more accurate calculation.

I plan on using an 18V center tapped transformer for this design, and the "+18V" rail feeding directly into the collector of the complementary pair pass transistor will be switchable between 9V and 18V. Because the op amps and all the regulator circuitry will be hard-wired to the highest voltage rail, this means that if I set the output at 9V, I can set my transformer tap to "9V" (which will realistically be (sqrt(2)*9-1.2) volts = 11.5V average at low load) then I can have a very small voltage drop across the Sziklai pair (maybe 900mV or even less) as it saturates due to the base voltage being potentially higher than the collector.

With my design, I expect the maximum power dissipation to be approximately (((9 × sqrt(2)) - 2)Vin - 0 Vout)*5A ? 55W power dissipation. Not too bad! I small CPU heatsink can easily tolerate that, possibly without active cooling! And since some of that power is dissipated in the shunt resistor (about 2.5W max) the transistor shouldn't ever see much more than 50W dissipation.

As for the dropout voltage, I choose to use a Sziklai pair for the output. These may be difficult to stabilize in some cases, but I personally have not had much trouble with them, at least not much more than a discrete darlington arrangement. (I'm actually quite fond of that arrangement! Nearly all the advantages of darlingtons it only requires 0.6v for "Vbe.") My hard-wired circuit was able to achieve 2V dropout at 3A when using a 2N2955 & 2N4401, versis 5V at 3A with a MJE3055 & 2N4401 darlington arrangement.

I like BJTs more than MOSFETs, even though I know darn good and well that MOSFETs >> BJTs in many designs and applications. Also since I didn't have high power MOSFETs on hand so I choose to go 100% oldschool BJT.
With 1 TO-247 with a Rthj-case of 0.45C/W, a 1C/W heat-sink (http://uk.farnell.com/abl-heatsinks/345ab1000b/heat-sink-1-c-w/dp/150016) and 50W dissipation, the mosfet temp will be 97.5C without a fan, that's a lot so be sure that a CPU heat-sink can handle it.
calculated here: http://www.daycounter.com/Calculators/Heat-Sink-Temperature-Calculator.phtml
« Last Edit: January 03, 2017, 10:18:41 pm by ZeTeX »
 

Offline Kleinstein

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Re: Anything wrong with this linear PSU design?
« Reply #40 on: January 03, 2017, 10:47:21 pm »
MOSFETs have a few disadvantages in a linear power supply:
They need the higher control voltage (e.g. more like 2-4 V instead of 0.7 or 1.3 V for a BJT).
Parallel configurations are more difficult due to scattering in gate threshold and usually higher TC.
The SOA curve on MOSFETs are somewhat less reliable - so only a few types work well. MOSFETs specially made and tested for linear operation are expensive.
MOSFETs at low currents get really slow and at higher currents they get really fast (could be a problem too). So they tend to need more minimum load than BJTs. As a MOSFET also needs a low impedance gate drive, there is no clear advantage if no load loss / efficiency. With audio amplifiers there is usually a higher loss with MOSFET class AB stages compared to BJT based ones.

The Sziklai pair can perform very well, if does not oscillate. This is especially tricky with variable load and the power transistor not on the board, but with lose cables an a heat sink. It is not per se stable, even the simulation says so. Without extra compensation it is more like on the edge - so it can be parasitic effects that make the difference.

The classical circuit with diode minimum for the voltage and low side shunt works reasonable, but with a slow current limit. The classical fix is to have an extra fast current limit and accepts the relatively large current pulse and not that good current limiting / CV-> CC transition. The fast limit usually needs the second shunt like resistor. The voltage is limited by the OPs - so more than about 25-30 V get difficult.
 

Online David Hess

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Re: Anything wrong with this linear PSU design?
« Reply #41 on: January 04, 2017, 12:59:13 am »
Power dissipation is limited by die size and MOSFETs are more expensive than bipolar devices for a given die size although the difference has fallen over time.  I used to run into this all the time when selecting complementary P and N channel MOSFET pairs.  For a given Rds, P channel MOSFETs have a higher power rating and the capacitance to go with it because of their larger die size.  Pick complementary MOSFETs for roughly equal dynamic performance and the P channel MOSFET will have a higher Rds and equal power rating.

I have only rarely seen power MOSFETs used in parallel for linear applications but they always required matching, more source ballasting than a bipolar transistor, extra circuits to handle their variation in Vgs, or some combination.  Oddly enough operating integrated regulators in parallel has the same problem because of their very low output resistance and the same solutions apply.  In comparison, parallel bipolar transistors are easy to deal with.

Bootstrap the operational amplifiers off of the output voltage and then the output voltage will not be limited by the operational amplifiers' supply voltage.  The original current limit error amplifier here was almost setup this way.  I think HP liked to do this and it is readily applicable to this design for both the current and voltage control loops.

It would be interesting to replace the drive transistor of the Sziklai pair with a power MOSFET.  This might be worth doing in a high voltage design with bootstrapped error amplifiers which would likely use a floating control circuit supply anyway so the higher Vgs would not be a problem.

The Tektronix PS501 and PS503 designs use an LED in series with the output of the current error amplifier to indicate when current limiting is in effect.  This works well but LEDs are fragile and if the LED fails open, then the current control loop fails to operate.  An optocoupler could be used in place of the LED for detecting the operating mode.

My solution is similar but I place a PNP emitter follower at the output of each error amplifier and bring the collectors to the negative bias supply.  The emitter followers unload the operational amplifier outputs preserving their precision at the cost of another 0.6 volts of voltage drop (the diodes are still needed if the amplifier outputs are not clamped to prevent reverse Vbe breakdown) and the collector currents can either drive voltage and current mode indicator LEDs or the collector currents can be detected to indicate mode.  Older designs used p-channel JFETs instead of a PNP transistors.

I think the problem with that idea is that if current limiting occurs at Vout = 13V or higher, (suppose a 5 ohm resistor at 2.7A current limit? Vout = 13.5V) then the output of the op amp will be pretty high, around 14 or 16V depending on the diode and pass transistor chosen, there may not exist enough voltage to power an LED, it's brightness may become roughly dependant on output voltage. That is why I used an additional comparator (well, a lousy 741, anyway.)

Take a look at the PS501 or PS503 schematics to see what I mean.  The output voltage from the supply follows the output voltage of whichever error amplifier is currently operating plus an offset (1) which is the difference between the drive transistor Vbe (or 2*Vbe if a Darlington is used) and the diode voltage drop.  Adding the LED in series with the operational amplifier outputs increases the offset so the output voltage *increases* compared to the error amplifier outputs making it more difficult to achieve *low* voltages; the negative control voltage would need to be further lowered to make up for this.  My change was to use an emitter follower in place of the LED and place the LED into the collector circuit.

In either case, the current through the LED is the difference between the current from the drive transistor bias circuit and the base current of the drive transistor which is what makes using a MOSFET (or 317) for the drive transistor an interesting idea although I never needed to try it.  I never built one of these where the current difference between 0 and full output current caused enough change in drive current to be a problem and even if it was, excess current could be routed around the LED with a zener diode and resistor.

In a higher power design with all bipolar transistors, the emitter follower at the output of the error amplifiers would be required anyway if the operational amplifiers could not sink enough current at low supply output currents.

(1) The pass transistors provide no voltage gain within the control loops which is good for stability.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #42 on: January 04, 2017, 04:50:12 am »
Quote
With 1 TO-247 with a Rthj-case of 0.45C/W, a 1C/W heat-sink (http://uk.farnell.com/abl-heatsinks/345ab1000b/heat-sink-1-c-w/dp/150016) and 50W dissipation, the mosfet temp will be 97.5C without a fan, that's a lot so be sure that a CPU heat-sink can handle it.

OK, I checked, my transistor would get quite toasty inside at the worst case scenario, with 1.67oC/W thermal resistance. Taking a look at the power derating curve, I can dissipate approximately 50W so long as my case temperature does not exceed 65oC. Assuming the thermal resistance between the case and heatsink is negligible (directly coupled) then the thermal difference is negligible*50 = sorta negligible. Maybe a 10ish degrees. (I have a thermocouple and might measure this.) So my heatsink cannot exceed 55oC, and assuming the xbox CPU heatsink is 0.6oC/W then the maximum ambient air temperature tolerable is 30oC.

So if I was running at the absolute worst possible case with my design, for an extended period of time, on a hot summer day outside, then I might be in trouble, running a bit hot. I could use the larger TIP2955 or even the 2N2955 which would effectively solve the thermal problem, or I could parallel 2 or more MJE2955's to increase dissipation.



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Bootstrap the operational amplifiers off of the output voltage and then the output voltage will not be limited by the operational amplifiers' supply voltage.  The original current limit error amplifier here was almost setup this way.  I think HP liked to do this and it is readily applicable to this design for both the current and voltage control loops.

It would be interesting to replace the drive transistor of the Sziklai pair with a power MOSFET.  This might be worth doing in a high voltage design with bootstrapped error amplifiers which would likely use a floating control circuit supply anyway so the higher Vgs would not be a problem.

I did in fact consider that. I figured in the original design, if I choose to use discrete op amps for the current and voltage limit, then I could have easily did that. I was considering to make the voltage feedback simply unity gain and feed a 0V -15V signal to the non-inverting input and set up a +/- 5V supply referenced to the actual output. I gave up on that realizing that I would then need a DAC capable of 15V output, and did not want to bother with adding more op amps to operate as an gain=3 amplifier, and still have to figure out what to do for an affordable DAC capable of constant current sink output. So I moved the current shunt to the low side, and ended up liking this solution better because both the voltage and the current set can be set with 2 voltages (0-5V).

So I do acknowledge that this supply design has a shortcoming regarding maximum voltage capability, If I need more than 2x 15V (Cause I'm-a-gonna build 2! :D ) then I may use a different design entirely.

 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #43 on: January 04, 2017, 05:17:34 am »
As for the compensation pins on the op amp, it appears these do not appear on the model in easyEDA. Not sure how to fix that. Is it worth bothering with?
 

Online David Hess

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Re: Anything wrong with this linear PSU design?
« Reply #44 on: January 04, 2017, 06:13:04 am »
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Bootstrap the operational amplifiers off of the output voltage and then the output voltage will not be limited by the operational amplifiers' supply voltage.  The original current limit error amplifier here was almost setup this way.  I think HP liked to do this and it is readily applicable to this design for both the current and voltage control loops.

It would be interesting to replace the drive transistor of the Sziklai pair with a power MOSFET.  This might be worth doing in a high voltage design with bootstrapped error amplifiers which would likely use a floating control circuit supply anyway so the higher Vgs would not be a problem.

I did in fact consider that. I figured in the original design, if I choose to use discrete op amps for the current and voltage limit, then I could have easily did that. I was considering to make the voltage feedback simply unity gain and feed a 0V -15V signal to the non-inverting input and set up a +/- 5V supply referenced to the actual output. I gave up on that realizing that I would then need a DAC capable of 15V output, and did not want to bother with adding more op amps to operate as an gain=3 amplifier, and still have to figure out what to do for an affordable DAC capable of constant current sink output. So I moved the current shunt to the low side, and ended up liking this solution better because both the voltage and the current set can be set with 2 voltages (0-5V).

So I do acknowledge that this supply design has a shortcoming regarding maximum voltage capability, If I need more than 2x 15V (Cause I'm-a-gonna build 2! :D ) then I may use a different design entirely.

For designs up to 20 volts and using 36 or 44 volt operational amplifiers like the PS501 and PS503, bootstrapping is not necessary so I did not recommend it.  It would be convenient though if you wanted to use any of the various lower voltage operational amplifiers available today.

Configuring a DAC to sink a constant current is easy enough with a single low voltage operational amplifier and n-channel JFET or MOSFET.  Using a bipolar transistor adds an error from its base current.

http://www.linear.com/solutions/1562

Or if you want to use a current DAC's output directly, then a n-channel JFET or MOSFET cascode will allow high output voltage with no error.
 

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #45 on: January 04, 2017, 03:35:12 pm »
Or if you want to use a current DAC's output directly, then a n-channel JFET or MOSFET cascode will allow high output voltage with no error.

I have considered that, but I wasn't sure how accurate that would be. I do recall GreatScott on youtube did design a dummy load but it had serious stability issues which he did not address. If I used a cheap voltage DAC, I could possibly have referenced it to the high side such that it generates a voltage exactly where the resistor in the original design was, and I could have used an optocoupler to communicate to it digitally from an arduino anywhere (voltage-wise) in the circuit. This would probably have been the better solution.

 

Offline VEGETA

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Re: Anything wrong with this linear PSU design?
« Reply #46 on: January 04, 2017, 03:58:24 pm »
Your circuit seems to have a negative rail, will that rail consume the whole current of say 2A? In my design, the source is battery pack and not a center tapped transformer or whatever you are using. So my way of getting a negative 5v is to have maxim charge pump IC that only allows 10mA of current. Now this is not gonna be good for your design idea at all right?

won't it be good if high-side monitoring is used? can you please try it with your circuit and see if it works properly in ltspice.

Also, won't it be better to have a darlington pair in one IC instead of pnp-npn? I haven't tested your circuit with low dropouts tbh.

Offline PowermaxTopic starter

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Re: Anything wrong with this linear PSU design?
« Reply #47 on: January 04, 2017, 04:57:28 pm »
Your circuit seems to have a negative rail, will that rail consume the whole current of say 2A? In my design, the source is battery pack and not a center tapped transformer or whatever you are using. So my way of getting a negative 5v is to have maxim charge pump IC that only allows 10mA of current. Now this is not gonna be good for your design idea at all right?

won't it be good if high-side monitoring is used? can you please try it with your circuit and see if it works properly in ltspice.

I would certainly hope that the -5V rail does not sink 2A of current!!!  :o It only exists because the op amps (LM741, or the much better LT1007) do not operate down to -Vcc. If you replace the op amps with one that can operate down to the negative rail (*Ahem*, LT1013/LT1014), and you have a constant current source that can sink at least some current down very near ground, then you could pontenially omit the -5V auxiliary entirely.

And yes, my original design used high-side current sensing. Everyone seems to have a different opinion whether it should have lo-side or hi-side current sense. It honestly does not matter. But my original design did not allow you to set the current accurately when the output went below 1.5V. This is a result of the current source (temperature compensated LM334 circuit) minimum "dropout" voltage. The LM334 cannot maintain a accurate constant current below 0.9V, and since an additional diode was added for temperature compensation, it's actually 1 Vd (or approx 0.6v) higher than that.

Also, won't it be better to have a darlington pair in one IC instead of pnp-npn? I haven't tested your circuit with low dropouts tbh.

Yes, you are correct.* That configuration is called the Complementary Darlington. It's generally a bit less stable than a typical darlington configuration, but I have not had problems regarding it specifically. The advantages of this configuration is that the gain is essentially the product of the 2 transistors, but the effective Vbe voltage remains at 0.6V. It is quite often used in quasi-low dropout regulator designs. In fact, it's used in the LT3080 and LT3081 devices! The only disadvantage is stability in some cases and supposedly slightly higher saturation voltage, although I have not personally observed that in discrete designs. At 5A with generic NPN and PNP transistor models in LTspice, I see no almost no difference.

At 5A current, both configurations have a saturation voltage (Vce) of about 1V. The complementary darlington saturates at a lower Vbe.
 

Offline Kleinstein

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Re: Anything wrong with this linear PSU design?
« Reply #48 on: January 04, 2017, 05:23:02 pm »
The last circuit from Powermax still has a few minor weaknesses:

The current limit is not that fast (this a general problem with this type of circuit). So an additional fast limit might be a good idea. With a darlington output stage this could be just the available base current. One option for this would be a transistor in base configuration in series with the diode - so the current regulator does not have to follow the full voltage drop on a dead short. However this could cause a stability problem for the Szikla stage as the driving side is than high impedance.

It would also effect anti-windup for the CV side. The way it is done (extra transistors) does not work well for voltage below about 1/3 of the set value anyway (it need the OPs output to be more positive than the input side). There is an easy way to get at least approximate anti windup: connect the compensation from behind the diode.

As shown, the regulator can have trouble with a large low ESR (e.g. 1000 µF with less than 0.1 Ohms ESR) cap at the output, as output impedance is very much like an ideal inductor in the < 100 Hz range. To prevent this, one usually adds some phase boost at the voltage feedback. This also has two positive side effects:
After CC mode was active the voltage is coming from below, relatively slow (e.g. ms time constant). So anti windup for the CV part is not that import any more. Also as the divider is loosing less, the GBW for the OP can be a little lower.
 

Online David Hess

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Re: Anything wrong with this linear PSU design?
« Reply #49 on: January 04, 2017, 05:25:00 pm »
Or if you want to use a current DAC's output directly, then a n-channel JFET or MOSFET cascode will allow high output voltage with no error.

I have considered that, but I wasn't sure how accurate that would be. I do recall GreatScott on youtube did design a dummy load but it had serious stability issues which he did not address. If I used a cheap voltage DAC, I could possibly have referenced it to the high side such that it generates a voltage exactly where the resistor in the original design was, and I could have used an optocoupler to communicate to it digitally from an arduino anywhere (voltage-wise) in the circuit. This would probably have been the better solution.

FETs make bias current errors insignificant in cascodes and voltage to current converter output stages.  Older simple designs would have used Darlington connected bipolar transistors.  It would be interesting to make a complex discrete low bias current error bipolar design but fortunately that is not necessary. (1)

FET input and low bias current bipolar operational amplifiers take care of the problem with bias current in the error amplifier.  Picoamp input current bipolar operational amplifiers like the LT1112s you have might seem to be obsolete but they have good noise, good precision, and stable input bias current with temperature.

That leaves error from offset voltage in operational amplifiers which is largely fixed and gain error from resistor tolerance and gain drift from resistor temperature coefficient.  If an operational amplifier voltage to current converter is used then matched resistors can be used at the top and bottom.  But a majority of the resistor error will come from the current shunt itself.

How much current limiting precision and accuracy do you want?  Excluding the current shunt, any design should be capable of 12 bit accuracy or 0.25mA resolution out of 1A full scale which is 250ppm.  The current shunt is the most error prone element and current shunts better than 20ppm/C are expensive.

(1) I am dubious about relying on low gate leakage current in small signal power MOSFETs but many people report good results.  JFETs are a sure thing.
 


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