Author Topic: Trouble understanding Intel ADC specifications  (Read 569 times)

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Offline splin

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Trouble understanding Intel ADC specifications
« on: June 17, 2018, 08:48:13 pm »
Can anyone interpret this spec for the Intel 80C196 microcontroller's ADC? In particular for non-linearity it has 0 min and +/=3 LSBS maximum. Fine, but what could they have meant by 'Typical 1.5 +/- 2.5 LSBs'?

I'm not particularly interested in the specs themselves but I'm curious as I've never seen a spec like this before. Was it just a mistake (the datasheet is marked preliminary)?

« Last Edit: June 17, 2018, 08:56:19 pm by splin »
 

Offline T3sl4co1l

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Re: Trouble understanding Intel ADC specifications
« Reply #1 on: June 17, 2018, 09:20:36 pm »
Simple: some people think "0" is less than "-3".  How and why these people are permitted to write datasheets, is beyond me, but apparently it happens.

Tim
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Offline splin

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Re: Trouble understanding Intel ADC specifications
« Reply #2 on: June 18, 2018, 02:47:42 am »
Simple: some people think "0" is less than "-3".  How and why these people are permitted to write datasheets, is beyond me, but apparently it happens.

Tim

And they would be right in this case. What is your point? 0 LSB non-linearity is much smaller than -3LSBs. I'm not sure who's simple here but naturally I don't think it's me  :)

But back to the original question, what do you suppose  'Typical 1.5 +/- 2.5LSB' means?
 

Online Bassman59

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Re: Trouble understanding Intel ADC specifications
« Reply #3 on: June 18, 2018, 04:50:43 am »
Simple: some people think "0" is less than "-3".  How and why these people are permitted to write datasheets, is beyond me, but apparently it happens.

Tim

Actually, it does make sense. For absolute error, the minimum (least) error you can have is no error (0 LSb). The maximum error can be 3 LSb in either direction, either positive (+3 LSb) or negative (-3 LSb).

Same for the leakage spec. The minimum (least) leakage is zero. The maximum is 3 μA in either polarity.
 

Offline T3sl4co1l

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Re: Trouble understanding Intel ADC specifications
« Reply #4 on: June 18, 2018, 10:29:10 am »
Simple: some people think "0" is less than "-3".  How and why these people are permitted to write datasheets, is beyond me, but apparently it happens.

Tim

Actually, it does make sense. For absolute error, the minimum (least) error you can have is no error (0 LSb). The maximum error can be 3 LSb in either direction, either positive (+3 LSb) or negative (-3 LSb).

An error is unsigned (assuming an abs(e) or e^2 metric), therefore writing -3LSB is nonsense.  It should be 0 to +3.  Or omit the 0 altogether because it's understood it can always be better, and obviously the minimum error is zero, only idiots don't know that... :P

Quote
Same for the leakage spec. The minimum (least) leakage is zero. The maximum is 3 μA in either polarity.

See, you're one of them, aren't you? ;)  Current has sign, traditionally positive current flows out of a pin and negative current flows into a pin.  So it is meaningful to give both, and it could be important that they aren't equal -- say if the positive leakage component in an open-collector output is due to the ESD diode, while the negative is due to the transistor.

Tim
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Offline splin

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Re: Trouble understanding Intel ADC specifications
« Reply #5 on: June 18, 2018, 09:56:58 pm »
Simple: some people think "0" is less than "-3".  How and why these people are permitted to write datasheets, is beyond me, but apparently it happens.

Tim

Actually, it does make sense. For absolute error, the minimum (least) error you can have is no error (0 LSb). The maximum error can be 3 LSb in either direction, either positive (+3 LSb) or negative (-3 LSb).

An error is unsigned (assuming an abs(e) or e^2 metric), therefore writing -3LSB is nonsense.  It should be 0 to +3.

Rubbish. Errors have both sign and magnitude. When I look at an error I very rarely want to square it unless I'm doing a least squared fit. Some characteristics may always be positive, always negative or either in which case the maximum is +/- xx

Quote
Or omit the 0 altogether because it's understood it can always be better, and obviously the minimum error is zero, only idiots don't know that... :P

Well I'm obviously an idiot then (actually that's probably true  :) ). True, many specified characteristics may have 0 as the minimum but many others don't - eg. CMRR etc. It's feasible (but it woud be unusual) for a characteristic to be > Xmin and < Xmax if it is positive OR < Ymin and > Ymax when it is negative, but never 0, perhaps due to hysterisis.

Quote
Quote
Same for the leakage spec. The minimum (least) leakage is zero. The maximum is 3 μA in either polarity.

See, you're one of them, aren't you? ;)  Current has sign, traditionally positive current flows out of a pin and negative current flows into a pin.  So it is meaningful to give both, and it could be important that they aren't equal -- say if the positive leakage component in an open-collector output is due to the ESD diode, while the negative is due to the transistor.

Tim

Ok. Now you've got me confused - you seem to be agreeing that the maximum leakage should be specified as +/- 3uA. Perhaps I missed that the smileys meant you didn't really mean it?

All the above still doesn't answer the question, "what does 'Typical 1.5 +/- 2.5LSB' mean?" I'll put you down for a don't know.  ;D
« Last Edit: June 18, 2018, 09:58:54 pm by splin »
 

Online edavid

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Re: Trouble understanding Intel ADC specifications
« Reply #6 on: June 18, 2018, 10:48:29 pm »
I vote for a mistake.  The 8XC196KC datasheet was updated to say 1.0 +/- 2.0, which shows that some other idiot tried to fix it :-//
« Last Edit: June 18, 2018, 10:53:31 pm by edavid »
 


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