Glue logic isn't going anywhere. There's just less of it used in any given place, compared to the bad old days when you needed, say, whole cards of the damned stuff to accomplish much of anything.
Give or take, if you need more than two or three chips to do the job -- just toss it in a micro, or FPGA. Occasionally you find an ASIC which does the function as well -- more and more highly-specialized chips appear on the market, day by day.
It's rare that it's economical or otherwise worthwhile to build even a fairly modest function out of hardware logic, let alone because, if you need to make changes coming up to or following release, you're SOL with hardware, but firmware can be updated.
Mind, it may cost more to write that firmware. If you're doing a few-off sort of thing, and the application is well defined, the break-even point might be more like dozens of chips worth of logic.
Which one, MCU or FPGA, depends on how fast and accurately (mainly in terms of timing) you need the result. FPGAs are excellent for electronic interfaces and high bandwidth systems; it's nigh impossible to interface even a high-performance MCU to something like a vintage PC or console bus, but trivial for an FPGA. (Some MCUs do in fact include bus interface hardware, or complex timers, SPI or other peripherals which can be used in these ways. Some even include whole state machines, like RP2040's PIO. Or specialized devices with very high granularity per pin or group, like XCore.) For everything else, the grade of MCU dictates how much processing and bandwidth can be done, within a modest (often poorly defined, due to inconsistent timings: execution path variation, cache stalling, interrupt overhead, etc.) time frame, say µs to ms, and up. Top-of-the-line CPUs (ARM64, amd64, RISC-V, etc., with zillions of extensions each, and often paired with even more impressive vector-data and array-CPU style GPUs) offer many GFLOPS of performance, even just as a starting point, let alone with all the cores brought to bear (TFLOPS are available!).
I use a lot of standard logic ICs, both for logic, but especially for timing. Mostly 74AC or 74HC, but sometimes also 4xxx series.
CPLD/FPGAs could do it as well, but the problem is that their power consumption is horrendous. The lowest power CPLDs I've managed to find burn 100+ mA, where my standard logic will need less than 5 mA.
AFAIK, CPLDs are obsolete -- give or take exact design and functionality, as there is a lot of overlap with FPGAs, but classics like MAX5k/7k were so ridiculously thirsty due to use of EEPROM programming. Basically as I understand it, it's NMOS logic, where the logic functions are programmed in via floating gates. There's no complementary EEPROM (or, it's not worth setting up complements
and the programming logic to set them) so it's either off or sinking bias current. In an E(E)PROM (chip, as such), you only get that current consumption during a read cycle, here it's 100% always-on; ridiculously inefficient.
Modern FPGAs do... other things; what, I'm not up to speed on, but an example is a Flash block off to the side, that's copied into SRAM automatically during startup (which does cost a few ms at power-on, which can be prohibitive in those weird applications when you really do need instant-on function). AFAIK, external configuration Flash is still very common as well (the chip is read in via SPI or whatever, filling SRAM tables -- LUTs, logic arrays, etc.).
Tim
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