Electronics > Projects, Designs, and Technical Stuff
Audio DACs and some odd frequency goings on.
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hamster_nz:
As a learning project I've got four inexpensive 24-bit I2S ADC feeding into four equally inexpensive 24-bit I2S DAC (CS4344), via an FPGA. The design  is currently running at 48KS/s. Components and layout follow the reference implementation in the datasheet. The ADC seems to work really well - a good input generates the same output spectrum as a lookup table in the FPGA.

However, regardless of if I use the ADC, or generate the samples from a lookup table I have some unwanted aliases appearing in the output.

The aliases are always Fin + n*(8 kHz), and of course 'fold back' at 0Hz and 24kHz (as you would expect aliases to). So if I put 10kHz in I get the largest spikes at 2kHz and 18khz, and then a smaller one at -6kHz and 22kHz,  So looks like a small amount of non-linear something is going on, involving an 8kHz signal. The odd thing is I don't have a 8kHz signal anywhere.

So I found the worst possible case, and looked at it on the scope (see image). Sample rate is 48kHz, F_in is a smidge under 16kHz, most likely due to the signal generator having a different reference to the ADC/DACs. That gives three samples per cycle going into the DAC.

It looks like the DAC generates 12 'steps' for the cycle, so to me it looks like it up-samples internally to 192kHz. And 8kHz is 1/24th of the 192kHz - and I'm using it in 24-bit mode. Is it somehow related? Could it be that one step in 24 is somehow 'bigger' than the others causing the unwanted modulation?

Anybody got any ideas what is going on, or is it just that the CS4344 is an inexpensive audio DAC and I am expecting too much from such a cheap part?


hamster_nz:
Oh, I switched my AD2 sampling into 'average' rather than 'decimate' mode, so now the spectrum looks a lot better for the noise floor, with it matching that expected from a audio DAC.
hamster_nz:
Got the data from the scope trace, and wrote some code to extract the desired 16kHz signal and the undesired 8kHz signal from the noise and print what is left over.

Threw it into a spreadsheet and this is the first graph. The 8kHz signal (yellow) is so low that it looks like a straight line (as the numbers suggest).

The second graph has the 8kHz signal on the secondary axis, so it is at least visible and the relative phase can be seen.

Seems the signal is coming out of the DAC - no idea what or why though. Oh well....
SiliconWizard:

--- Quote from: hamster_nz on November 30, 2019, 10:45:04 am ---Oh, I switched my AD2 sampling into 'average' rather than 'decimate' mode, so now the spectrum looks a lot better for the noise floor, with it matching that expected from a audio DAC.

--- End quote ---

What is AD2?

For the noise floor yes, but otherwise it looks pretty poor compared to even an average 24-bit audio DAC as far as THD is concerned. You definitely have some issue there. Not sure what it is without more info.

What is your MCLK frequency, and are you 100% sure of your I2S transmit block?
bson:
Do you have both ends set to single channel?  Looks like the MSB is flipping, which could possibly be the case if the ADC is sending stereo while the DAC expects mono.

I'd stick my MSO probe on there and check timing, waveform shapes (ringing, overshoot, runts, crosstalk, etc), and that it all looks like it should.
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