LPC1347 mini DIP board for breadboarding

[0xdeadbeef]

Nothing exotic, but I want to do a project with an LPC1347 and thought it would be handy to create my own little DIP style carrier board to use the µC on a breadboard or in the prototype
So is there anything especially dumb about this design?
My main concern is that the traces from the Xtal pins are a bit longer than 10mm. I tried to match them to ~15mm - therefore the one trace is a but curvy.
I'm aware that most of you would use smaller caps than 0805 and also a real SMD crystal. Actually I might change the crystal to a HC49-SMD, but it would need a bit more space due to the pads.
Note that the 3D model is a HC49-SMD, but the footprint is HC49/U-S - the real part should not overlap with the capacitors.

[nctnico]

I'd try to route the 3V3 line along the edge of the board and not thru the middle.

[bktemp]

Why did you try to match the length of the traces from the crystal pins? It does not matter.
It is more important to make them as short as possible to avoid any other signals injecting noise. Since you have surrounded the crystal traces only by ground plane, it should be ok.
I would straighten the curved traces to make it shorter.
Maybe you could add some more GND pin to improve signal integrity when toggling multiple pins at the same time (ground bounce).

[0xdeadbeef]

Hm, ok I reworked the board a little to get the crystal closer to the xtal pins. The longer one is now reduced to 11.6mm. Doesn't look so symmetrical any more, but yeah well.
I also tried to move the bypass capacitor closer to the GND/VDD pins, but there's not much more room for improvement now without changing the layout completely.
The only option left to make the traces shorter would be to move the bypass capacitor and/or the crystal to the bottom, but I don't quite like the idea.

@nctnico I'm not so sure what you mean there. In the end, the 3V3/VDD must come from the side and go to the middle.
What I could tois to move the VDD (and GND) pin(s) to the middle on the header (e.g. GND left middle and VDD right middle). From a practical point of view, I like the current pinning better though.
Not sure if it's worth the effort just to make the VDD trace shorter.

I toy with the idea to put a debug header (10 pin SWD) on the PCB. Would be nice to have for breadboarding.

[nctnico]

@nctnico I'm not so sure what you mean there. In the end, the 3V3/VDD must come from the side and go to the middle.

True but try not to split the ground plane too much. For these footprints I usually put a VCC copper pour on the top layer which connects all the VCC pins. This allows a continuous ground plane on the bottom layer.

I'd also put pull-up resistors on RESET and the pin which makes the chip enter the bootload at power-up.

[0xdeadbeef]

Ok, thanks for the feedback guys. I did another (final?) rework.
Moved the GND and VCC pins to improve the layout. The ground layer on the bottom is as good as it can get, also added a small VCC pour on top layer (under IC).
I don't add pullups mainly to avoid clutter but also since all pins in question (actually nearly all) have an internal weak pull-up per default anyway.
Besides, this is not meant as minimum eva board, but as DIP like core board.