EMI absorbers

[Scutarius]

Hi,

I am designing a product (for UL certification) and I know nothing about EMI tests, how can I assure EMI radiation?

The product has smps and RFID, for the smps I am planning a custom metal enclosure and/or emi absorbers (like 3M AB-5000)

Do you have some information?

thanks in advance.

[jahonen]

My experience that it is kind of difficult, and it only comes with a (painful) experience. There are number of good books, but things in them probably make most sense if you first try it in practice. You can't really assure compliance by design (if not completely trivial), and thus compliance testing is only way to be sure.

You can get pretty much good estimate with a good spectrum analyzer, but near-field measurements are not often easy to do and require quite a bit of rehearse to learn what is important, since most stuff you'll see this way, are false alarms. One good thing is however, to measure the spectrum of supposedly low-speed signals. It is quite possible that if you drive low-speed signals directly from your MCU, the high-frequency noise in internal VCC rail of the MCU will leak out via low-speed IO-signals and cause emission problems. I have seen that happening quite recently.

In general, good EMI control comes first from suppression, and that involves designing the circuit properly, and equally and even more important, your PCB properly. Shielding comes only after all the suppression things are tried out.

Shielding is not even effective if your EMI comes from common-mode radiation from the cables attached to the board, in that case it is just a waste of money. My experience is that absorber materials work only for relatively high frequencies (hundreds of MHz) while typical SMPS problematic frequencies are typically between 40-200 MHz. Do you have any fast memory buses running on your board, or other wide parallel fast buses (like parallel LVTTL-interfaced color LCD)?

Very basis of good EMI design is clean ground, where you connect all your cables coming from your board. If your ground is dirty, then it is pretty much futile to try anything out. Clear tell-tale of this symptom is that if you disconnect all the cables from the board, your emission level will drop dramatically. My advice is that always over-do the ground of the PCB. Solid ground plane (or several!) is a good basis for a good ground.

Regards,
Janne

[Neilm]

EMI compliance is not easy for someone who has no experience in it. A few basic rules are
1) The earlier you consider it in the project the easier it is. At work we consider it at the same time we do safety consideration.
2) The "lower level" you fix it the cheaper and easier it will be. By that I mean if you can design a chip that does everything you need, is immune to all noise and emits no noise it will be very easy to do. In reality - most of the work is done at PCB level. This is especially true of SMPS - always follow the recommended layouts it will save a lot of hassle. At work we tend to have more problems with them than with what they are driving.
3) The "EMI tricks" you may have learnt 10 / 20 years ago are not as relevant today - indeed may actually cause more problems than they solve. I have an old product that had to be reworked when the EMC standard for the test and measurement industry changed. It had a double sided PCB with separate 0V tracks for analogue,digital and power. Making it a 4 layer board with common 0V throughout not only got it through the testing (it added £2.50 to the bare board PCB cost) but simplified the PCB assembly (removing one manual stage). During retesting I was able to remove a ferrite that had been in the instrument as a "fix" - result it was never securely held and used to come loose and bread (£1.50 saved) but reduced to noise on the reading to about a quarter of what it was.

Also remember that just because you have bought something that may say it is compliant (SPMS for instance) does not mean that you can use it a be compliant.

When testing for EMI a spectrum analyser is good to diagnose where the problem might be generated, but cannot be used for EMI testing. The reason being that it works in the near field where as EMI compliance is specified in the far field.

One site I have found invaluable is http://www.compliance-club.com. I would recommend trawling through the back issues paying attention to those articles by Keith Armstrong. He has several to do with the layout of units and PCBs so as to improve the chances of EMI compliance. I have a copy of his book and have been able to get things passed first time by following the recommendations in it.

After you have followed all the above find a good test house and do some testing. They should be able to have someone on hand to help troubleshoot.

Sorry this is a bit long - I'm coming down from a rant at some of my older colleagues who do not follow the above (point 3 in particular) then wonder why they have to put back the product launch 6 months while the fix the EMI issues.

Yours

Neil

[Scutarius]

Thank you for the fast and complete responses.

I have read some of the PCB articles of Mr. Armstrong I have more questions than before and more to read.

And if something is clear for me is the 2) point of Neilm, and as the PCB designer of the whole product I would deal with it.

Actually I use this layout, http://www.onsemi.com/pub_link/Collateral/AND8038-D.PDF page 7 and you can see a photo of it on the cover of http://www.onsemi.com/pub_link/Collateral/SMPSRM-D.PDF  One-layer PCB

With some modifications for my specs

I am going to use this enclosure http://www.okwenclosures.com/products/okw/comtec/zoom/zA0615107.jpg and the SMPS is located as the "lower" PCB, in the top will be the controlPCB (MSP430F2471) and one RFID antenna, and LCD screen. Two layer PCB, as you can see it is quite a simple product


I know that I cant ask for a simple way to do it, but having said all the things above (and assuming good layout) what Should I (unexperienced) do (or not to do, avoid) for at least, assure a good EM performance in theory?

Thanks guys, I will be reading more

I forgot to said that I work for a small company and I dont even have a spectrum analyzer, maybe consulting is the answer

[Neilm]

My basic tips:
1) Power and ground planes - don't split the 0v without a VERY good reason - safety requirements generally being the only one. 2 layers vs  4 layers is a debate for those who are wedded to the fallacy that instrument profitability is only achieved by the lowest component BOM cost.   
2) Remember a digital signal comprises of electrons flowing in a loop from the power supply, through some chips and back again. (You'll be surprised the number of digital designers who forget that).
3) Good emissions performance implies good immunity - they are two sides of the same coin.
4) Point 3 is achieved by good signal integrity - the smaller the current loop the higher the frequency signal will be required to cause problems.
5) Reduce the speed of output edges to what is required. This lowers the switching frequency.
6) Most importantly - make sure you know what standards you have to meet. You might find some "outs" in the standard - for instance if your instrument outputs a large EM disturbance very infrequently it might get through the test if you can  "quasi-peak" the results. Also, there is no point going over the top to protect from an 8kV surge if the standard says you only need to take 1kV.

I will confess I am lucky - I work at a large company and we have our own EMC facility. Means I get to do these tests on equipment and watch the results.

Yours

Neil

[jahonen]

MSP430 is hardly any problem for emission side, but I'd be cautious about LCD display. Not because of emissions but because it can be a pain in immunity sense. They are usually quite susceptible for ESD (reset problem), due to relatively wide bus with only one ground wire (I really hate those!) Can't say anything about rfid, though. From that, I'd say that it is the power which causes emission failure if there are problems with that at all.

A comment about spectrum analyzer, measuring common mode currents in cables (or virtual ones, such as sticking a wire to a board ground and scanning it for common mode current) is a good diagnostic tool, often even better than actual test anechoic RF-chamber, which only shows resultant field level, but does not give hints where the radiation is actually originated. It can be sometimes tedious to find the radiation source, and often it leads to random application of copper tape, ferrites, snubbers and common mode chokes. Of course final measurements need to be done in anechoic RF-chamber, but RF-current measurements with a spectrum analyzer can pinpoint the actual source better.

Completely agree on the PCB layer count, 4 layers is good starting point for EMC compliance. I hardly use less even for my own projects

Regards,
Janne

[chiaTu]

For a 4 layer design, do you bury all signals in the middle layers and have outer layers as GND?

[mikeselectricstuff]

Also remember that just because you have bought something that may say it is compliant (SPMS for instance) does not mean that you can use it a be compliant.

SMPS manufacturers' EMC tests  are usually done with a nice quiet resistive load. Noise from your circuit, or fast-varying loads (e.g. PWM)  can be conducted back through the PSU and a supposedly compliant PSU can fail conducted emission tests. 

[jahonen]

For a 4 layer design, do you bury all signals in the middle layers and have outer layers as GND?

Usually no. The idea is to get the signal return path near the signal, and that works just as well by having signals in top and bottom layers, GND in 2nd internal layer and VCC in 3rd layer. It is also important to keep same reference plane for whole route so one should avoid changing layer in the middle of the route. The trick in that is that normal 4-layer PCB buildup is such that dielectric thickness between 1-2 and 3-4 layers is in order of 0.2 mm, and 2-3 is about 1 mm.

With more complex PCB's with, say 6-8 layers at least, you then start to bury the signals. Nevertheless, half of the layers still are usually GND or VCC planes, and maintaining contiguous return path is important. Worst mistake you can make is to route something like 4 layers of traces in 4-layer board.

Here is one powerpoint presentation about EMC and signal integrity.

Regards,
Janne

[Neilm]

It is also important to keep same reference plane for whole route so one should avoid changing layer in the middle of the route.

If you do need to change layers with a signal, you can use a small decoupling capacitor at the point it changes.
Here is a freeware utility for electronics. It contains several a screen that allows you to calculate things like strip line impedences, maximum current and the like. Download it from here.

[Scutarius]

Thank you guys.

I appreciate it

[jahonen]

It is also important to keep same reference plane for whole route so one should avoid changing layer in the middle of the route.

If you do need to change layers with a signal, you can use a small decoupling capacitor at the point it changes.
Here is a freeware utility for electronics. It contains several a screen that allows you to calculate things like strip line impedences, maximum current and the like. Download it from here.

I forgot to mention that next best thing to keep same layer is to switch to opposite side of the same reference plane (the return current can then flow to opposite side of the plane in via antipad), but this is viable technique only when there are more than 4 layers.

Capacitor should be located between the reference planes near the via, or stitching via(s) if reference planes are at same voltage. Anyway, it is a bad, but often completely unavoidable thing to switch reference planes.

Regards,
Janne