Problems with a ripple counter + logic gates. Please help!

[PauloConstantino]

Hey friends,

this is my first post here.

I was designing a circuit and in the end it didnt work. I tried to identify the problem and I noticed something really weird. Basically I have a 4bit binary ripple counter, and I take 2 of the outputs 3 and 2 say, and send them into an OR gate. Then I probe the output with my scope and I see a waveform which is kind of a superposition of the two inputs, rather than an actual OR. I can't tell if it's just my scope that is going nuts, or whether I can't gate the outputs of the counter.

Here are some photos of the waveforms:

The first two are the input waves into the OR gate. The last is the output, as you can see it's garbage. As far as Im concerned, the main problem is not hazards, although there are small hazards embedded in the signal. But for the most part the signal is just an undecided signal. I dont know if my scope is loading the signal and changing it, but my scope is working perfectly. If I probe the inputs, they look perfect. It's just the outputs that are undecided. Please please help me!!

[Andy Watson]

Try triggering the scope on the slowest output. The glitch at each clock looks like a race-condition - one of the gotchas of using non-synchronous logic.