EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: HasanSyr on November 10, 2024, 02:14:01 pm
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I'm creating an FPGA dev board around a SOM (black PCB, has DDR and FPGA power done). The schematic below is the dev board's with the same SOM that the manufacturer makes. I'm trying to design the same circuit but with USB-C instead and I have a few questions:
Note: The SOM only needs 5 v +- 5% via the board-to-board mezzanine connectors. 3.3 v is used elsewhere on the development board. The SOM has the MP2143 regulator with EN/PG pins (important later).
- What is R1's purpose? Is it a pull up resistor?
- Do I just use the USB CC pins to select the input voltage of 5 V via 5k1 resistors or do I MUST use USB PD? The converter has a wide Vin range so I think it will be fine. Also Vin can be =Vout according to the datasheet.
- I'm mainly confused by the left side of both DC/DC converters. Does the capacitor and resistor (C4 & R1) on U1's EN pin make a debouncing circuit? If a debouncing circuit is present is a pull/up down resistor needed? Why does the label PW_Switch does not exist anywhere in the schematic especially not on J1 above? I think that's an error in the schematic.
- Why is there a voltage divider on U2's EN pin? It results in 6 v and according to the datasheet, Ven can equal Vin. The datasheet has no mention or application that shows this. The Sys_PG label connected to EN is shown as an output and the Sys_PG label that's present on the BTB mezzanine connector symbol shows it as an output as well? Is the Sys_PG going to the SOM's converter's EN pin then that's going back down to the dev board's 3.3 regulator to sequence it? Why is there a 0R resistor?
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R1 is just a pull-up resistor to turn on the 5V buck converter. It could have been just shorted to Vin but it is common to add a resistor for added protection and for access to the EN pin during testing. PW_SWITCH is just a label and if not used elsewhere is just means that 5V buck is always on.
The 5.11k resistors on the USB CC pins don't strictly set the USB voltage, they just tell the USB source that this is a sink (device) and if the source is PD capable the negotiation will fail and it will supply default power (normally at 5V). If you want to connect this to a PD capable USB supply and negotiate higher power levels then you need a PD controller chip.
C4 is just the buck converter input capacitor.
Both R5 and R9 are marked as not mounted (NC), basically, those are just placeholders so the 3.3V converter can be either configured as default on or default off. If both are installed they could be used as an under voltage lockout but I don't think that is the case here. SYS_PG allows the system to turn the 3.3V on/off in software. Most likely that 0R cannot be mounted if R5 is mounted - depending on what is connected to the other end of SYS_PG.
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R1 is just a pull-up resistor to turn on the 5V buck converter. It could have been just shorted to Vin but it is common to add a resistor for added protection and for access to the EN pin during testing. PW_SWITCH is just a label and if not used elsewhere is just means that 5V buck is always on.
The 5.11k resistors on the USB CC pins don't strictly set the USB voltage, they just tell the USB source that this is a sink (device) and if the source is PD capable the negotiation will fail and it will supply default power (normally at 5V). If you want to connect this to a PD capable USB supply and negotiate higher power levels then you need a PD controller chip.
C4 is just the buck converter input capacitor.
Both R5 and R9 are marked as not mounted (NC), basically, those are just placeholders so the 3.3V converter can be either configured as default on or default off. If both are installed they could be used as an under voltage lockout but I don't think that is the case here. SYS_PG allows the system to turn the 3.3V on/off in software. Most likely that 0R cannot be mounted if R5 is mounted - depending on what is connected to the other end of SYS_PG.
You mean if the voltage divider is there, the EN pin is driven by it (the voltage divider) via VDD?
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You mean if the voltage divider is there, the EN pin is driven by it (the voltage divider) via VDD?
If only R5 is mounted, the 3.3V buck is always on
If only R9 is mounted, the 3.3V buck is always off (this is redundant as there is already internal pulldown)
If both R5 and R9 are mounted, the 3.3V buck will only turn on when the voltage on EN is above 0.9V so you can choose R5 and R9 values to set the minimum VDD at which the 3.3V turns on (UVLO)
If R6 is mounted, the 3.3V buck will be enabled by SYS_PG, in this case R5 can only be mounted if SYS_PG can withstand the VDD voltage.
The schematic shows that only R6 is mounted, so 3.3V is controlled from SYS_PG
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You mean if the voltage divider is there, the EN pin is driven by it (the voltage divider) via VDD?
If only R5 is mounted, the 3.3V buck is always on
If only R9 is mounted, the 3.3V buck is always off (this is redundant as there is already internal pulldown)
If both R5 and R9 are mounted, the 3.3V buck will only turn on when the voltage on EN is above 0.9V so you can choose R5 and R9 values to set the minimum VDD at which the 3.3V turns on (UVLO)
If R6 is mounted, the 3.3V buck will be enabled by SYS_PG, in this case R5 can only be mounted if SYS_PG can withstand the VDD voltage.
The schematic shows that only R6 is mounted, so 3.3V is controlled from SYS_PG
U1 can't always be on because there is a power switch in the schematic and physically that part I still didn't understand.
Also, what purpose does the 0R resistor serve? I can't think of a way for the EN line to get shorted or something like that.
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U1 can't always be on because there is a power switch in the schematic and physically that part I still didn't understand.
Also, what purpose does the 0R resistor serve? I can't think of a way for the EN line to get shorted or something like that.
The switch simply selects the power source from either the barrel jack or CON4, obviously U1 will only be on when the power source selection is correct and power is present! :)
The 0R just allows a way to disconnect the EN from SYS_PG and use R5/R9 instead if needed.