I am upgrading Liv's PSL-3604 design to a dual 60V, 6A and modernising any components where necessary. If anybody has any known bugs can you let me know please. Thanks. I've simulated the upgraded model and it works fine. It will obviously need either two transformer/transformer combinations to keep isolation between the two channels. I could do it with lots of windings on one core, but that is messy and not just good transient isolation. For control I am thinking of having one CPU and opto-couple any control lines. For simplicity, and an obsession with doing things "properly", I am going to use SPI driven ADC's and DAC's with the SPI going through the opto barrier. Although not cheap, you can get 8 channel 16bit SPI DAC's for about 20 dollars which I think is ok. An added advantage, if you see it that way, is 1mV and 0.1mA setting resolution. I'll bring the outputs and sense lines to the front panel using safety 4mm sockets to ANSI/ESD S20.20:2014. I'm also going to use something like the LT4320 Ideal Diode Bridge Controllers for low loss rectification. I'm looking at needing maybe 5 or 6 voltage tiers to keep the dissipation down. Uprated FET's are needed which are easy to find. One thing that is bugging me with the model schematic and to a lesser degree the production schematic, is the 3 diodes in parallel with each of the voltage feeds from the rectification to the output FET drains. Anybody know why there are three?. I can't see any reason why one good rated Schottky won't do the job, but does somebody know otherwise?. I'm doing the whole thing in surface mount where possible. I use 0805 resistors and caps rather than the dust variety you can barely see. If you haven't done SM yet, it's nothing to afraid of. $10 stencils have made it reachable, along with modified toaster ovens for reflow.
Any comments, hints, etc most welcome. I intend to make all the design data freely available, obviously.
Git