Did you already find an appropriate P-ch mosfet for LTC3824?
Haven't looked but it shouldn't be difficult to find one. I only need to balance R
ds(ON) and C
GS. Higher input capacitance means more drive current for the LTC3824 but also lower R
ds(ON) usually. A 100V MOSFET like the IRF9520 or IRF9530 should do.
Hello
I might be a bit "out of topic" since you are discussing about preregulators again, but I found some interesting current monitors that might be useful for you.
http://www.diodes.com/datasheets/ZXCT1082_87.pdfTake a look maybe you can use these to simplify your design.
Hello
I might be a bit "out of topic" since you are discussing about preregulators again, but I found some interesting current monitors that might be useful for you.
http://www.diodes.com/datasheets/ZXCT1082_87.pdf
Take a look maybe you can use these to simplify your design.
Had a look and ruled them out for the same reason I ruled out the INA168 - Error vs. V
SENSE. If you take a look at the graph on page 7 this basically gives a 1:10 (maybe 1:20) range for current measurement, that's why I ended up with a discrete solution.
A few more simulations revealed that the linear part is an unstable mess and that's probably the last nail in the coffin for this project.
Did I understand correctly, you are giving up with your PSU or you are just referring here to the ZCXT1082 mentioned above?
Did I understand correctly, you are giving up with your PSU or you are just referring here to the ZCXT1082 mentioned above?
I'm probably too stubborn to give up. Transient response is a huge mess - ringing and overshoot due to the transistors not turning off fast enough. Back to the drawing board. Nothing to do with the ZXCT1082.
Oh, nice to know! It will be pity that everything just goes down the drain. You have my support to continue with your experimenting, offering various interesting ideas and fruitful discussion as before
Managed to fix it, sort of, at least that's what the simulation tells me. Only the voltage feedback loop was simulated. Damn lazy power transistors...
How can I improve it?
V_OUT is the output voltage - red. The green one is the MOSFET gate voltage.
EDIT: Output current in blue.
Why do you think that is only due to lazy power BJT? What's about your control op amp closed loop performance? It BJTs is really the source of the problem maybe it's time to start thinking about MOSFET.
Why do you think that is only due to lazy power BJT? What's about your control op amp closed loop performance? It BJTs is really the source of the problem maybe it's time to start thinking about MOSFET.
The opamp has 7V/us slew rate, fast enough, slowed down by C5 for stability reasons. I suspect it overshoots because of Q1, Q3 & Q4 not turning off fast enough. Increasing the value of C2 to 10uF pretty much solves the problem but I'd like to have the least amount of capacitance on the output because with higher value capacitors the output takes longer to settle.
The pulse in the simulation has 5us rise/fall times (0-3A and back to 0) and I have absolutely no idea if that's a bit too demanding or not.
The drawback of using a MOSFET is that it needs a V
GS of at least 4V so I'd need at least 5V across it in case of a P-channel MOSFET with the drawback of higher power dissiption (15W for a 3A output). Then there is the MOSFET input capacitance which could ruin stability... I'll have to do a few more simulations to see if it's a better alternative. As for real world performance, I don't have a digital scope so experimenting is quite pointless as far as transient load response goes.
The drawback of using a MOSFET is that it needs a VGS of at least 4V so I'd need at least 5V across it in case of a P-channel MOSFET with the drawback of higher power dissiption (15W for a 3A output). Then there is the MOSFET input capacitance which could ruin stability... I'll have to do a few more simulations to see if it's a better alternative. As for real world performance, I don't have a digital scope so experimenting is quite pointless as far as transient load response goes.
Yes, but you are going to use SMPS pre-regulator. It gives you a simple way to generate additional n Volts on top of its output voltage to bias MOSFET.
If you're concerned about the error amp, reduce C5 or add a resistor in series. Tweak values.
The waveform shown is simply what overshoot you'd expect. The slew rate is limited by C2-R2. The overshoot and undershoot are characteristic of an integral type compensator. If you want better transient waveforms, test between 10-100% or 50-100% of rated load, not 0-100%.
Also, the voltage gain stuff is really weird. Why does X1 need a follower? It can't be for current capacity, the pull-up resistor is quite weak. The gain stage seems to be wired for a gain of about 60, ten times what's necessary (the op-amp presumably has a range of 0-5V, give or take actual voltage range; the output stage can only ever use 0-30V). The gain stage has this weird emitter-feedback, but miller-compensated topology, which probably works fine, but probably also not as well as can be. It's also wide open on sheer current capacity.
Q6 can pull a maximum of 7.6mA, which will more than saturate Q5, even to >500mA Ic. Which will more than saturate Q4 (Ic > 6A), and dump some serious current into R4/R8 and Q1/Q3 base. Normally this simply won't occur, but even a momentary short circuit WILL destroy the transistors and/or resistors. Which will then burn R1/R6 as the transistors most likely fail shorted. If they actually go open-collector (unlikely, but possible), and if Q4 or Q5 survives, the circuit will still appear to work, but at much reduced ratings, which is even more strange. (Q5 delivering load current via shorted B-E's, or R5/R9.)
The suggestion for PMOS is funny because you've already got such an inverting gain stage (Q5). It just doesn't have the current capacity of an output device (well, it's not supposed to..), and is probably much faster (though slowed down by C4, oddly enough). But I wouldn't bother with MOS (P or N) for a bench supply, emitter followers are fine.
At the very least, an emitter resistor for Q5 would be a decent start, as well as a current limiter circuit for any of Q1/Q3/Q4. Foldback or adjustable current limit can be optional extras, but a hard wired limit is a must.
I would much rather see something like,
- TIP31C followers (no need for excess current capacity, unless it's just what you have on hand), two in parallel is good
- Modest e.g. 2N4401 driver, with suitable current limiting (collector can be supplied by a current source, if you're really hard core about protection)
- At least simple current limiting (e.g., 2N3904 or 4401 wired across one or both of the output emitter resistors, collector back to the voltage gain node -- the driver base)
- Gain stage should be passive current source (not sink), active pull down (common emitter amplifier), with shunt feedback (resistor from voltage gain node to base to op-amp). Offset needs to be adjusted, so some resistance from base to ground (or -V), and/or bias voltage at the emitter, will help there.
- Both C5 and C3 should have series resistors; C5 for improved compensation (type II / proportional-integral compensator), C3 because otherwise, transients at the output are coupled directly into the op-amp, potentially causing problems. R11-C3(-series R) also constitute a lead-lag network against the op-amp, which is useful for very difficult compensation needs, but likely unnecessary here. (Maybe it was necessary, as shown: with the already double-integral system from C2, C4 and C5?)
Tim
If you're concerned about the error amp, reduce C5 or add a resistor in series. Tweak values.
The waveform shown is simply what overshoot you'd expect. The slew rate is limited by C2-R2. The overshoot and undershoot are characteristic of an integral type compensator. If you want better transient waveforms, test between 10-100% or 50-100% of rated load, not 0-100%.
Also, the voltage gain stuff is really weird. Why does X1 need a follower? It can't be for current capacity, the pull-up resistor is quite weak. The gain stage seems to be wired for a gain of about 60, ten times what's necessary (the op-amp presumably has a range of 0-5V, give or take actual voltage range; the output stage can only ever use 0-30V).
Reducing C5 reduces stability, I'll try adding a series resistor
That was based on an older schematic, now I'm just using a 1N4148 for voltage and another one for the current (not shown), OR'ed together.
The gain is overkill, needs a bit of tweaking.
V3 - reference voltage - is between 0-4V for the 0-20V output version.
Q6 can pull a maximum of 7.6mA, which will more than saturate Q5, even to >500mA Ic. Which will more than saturate Q4 (Ic > 6A), and dump some serious current into R4/R8 and Q1/Q3 base. Normally this simply won't occur, but even a momentary short circuit WILL destroy the transistors and/or resistors. Which will then burn R1/R6 as the transistors most likely fail shorted. If they actually go open-collector (unlikely, but possible), and if Q4 or Q5 survives, the circuit will still appear to work, but at much reduced ratings, which is even more strange. (Q5 delivering load current via shorted B-E's, or R5/R9.)
The suggestion for PMOS is funny because you've already got such an inverting gain stage (Q5). It just doesn't have the current capacity of an output device (well, it's not supposed to..), and is probably much faster (though slowed down by C4, oddly enough). But I wouldn't bother with MOS (P or N) for a bench supply, emitter followers are fine.
At the very least, an emitter resistor for Q5 would be a decent start, as well as a current limiter circuit for any of Q1/Q3/Q4. Foldback or adjustable current limit can be optional extras, but a hard wired limit is a must.
I was thinking of using some faster simple current limiting set somewhere above the PSU's normal range to avoid blowing my series pass transistors as the current limiting loop is most likely too slow to prevent that.
I would much rather see something like,
- TIP31C followers (no need for excess current capacity, unless it's just what you have on hand), two in parallel is good
- Modest e.g. 2N4401 driver, with suitable current limiting (collector can be supplied by a current source, if you're really hard core about protection)
- At least simple current limiting (e.g., 2N3904 or 4401 wired across one or both of the output emitter resistors, collector back to the voltage gain node -- the driver base)
- Gain stage should be passive current source (not sink), active pull down (common emitter amplifier), with shunt feedback (resistor from voltage gain node to base to op-amp). Offset needs to be adjusted, so some resistance from base to ground (or -V), and/or bias voltage at the emitter, will help there.
- Both C5 and C3 should have series resistors; C5 for improved compensation (type II / proportional-integral compensator), C3 because otherwise, transients at the output are coupled directly into the op-amp, potentially causing problems. R11-C3(-series R) also constitute a lead-lag network against the op-amp, which is useful for very difficult compensation needs, but likely unnecessary here. (Maybe it was necessary, as shown: with the already double-integral system from C2, C4 and C5?)
Tim
I'll have to check the datasheets for some followers with good enough SOA for the worst case scenario for this specific version - they'll have to survive 25V @ 3A across them for a brief period.
Next step would be basically turning the gain stage upside-down and still keep the input voltage ground referenced... the opamp inputs will be protected using zeners.
Thanks for the input Tim, back to the drawing board...
... and stupid me ended up with a discrete opamp...
The series pass transistors are now driven by a current source...
More simulations are required to see if whatever, I'm trying to break it. If I can't it means it's a good idea.
Forgot to put R10 in and then I was wondering for a few hours why the output voltage doesn't swing to ground
Damn lazy power transistors.
I would suggest that you take a step back and ask yourself what your design goals are and how should you prioritize them.
A great design is a compromised design.
The design goals have changed a lot since the first post, took a lot of things further and I ended up with something far more versatile than I intended, which is a good thing.
I generally don't like compromises, for me it's either go big or go home. But then again that doesn't mean that all my designs suck. Small compromises are ok though...
Back the the improved crap linear regulator which I was just starting to hate, transient response is much better with a lot less overshoot. Load current varied from 1%-100% with rise/fall times of 10us. Had to increase the output capacitor to 10uF.
Tweaked a bit more - it should be stable now.
1us rise/fall times. 1%-100% load.
X1_outV_OUTQ4-baseEDIT: Changed C2 to 1n and R21 to 100R - response looks much better now. After little more fooling around I found out that it can output 40V @ 3A and be stable with a 50V supply, nothing changed except two feedback resistors. I think I nailed this one... it's breadboard time again for the next few days and hopefully I'll be able to contain the magic smoke if any
Back in 1976 I built a power supply from Electronics Today International. It is project ETI131, mine is still going strong and has stood the test of time. The only modification done recently was to fit one of the low cost (eBay, from China) dual LED meters to replace the original meter which had started to become a bit "sticky".
There is a link to a couple of zip files of the construction article on this page:
http://www.thebackshed.com/forum/forum_posts.asp?TID=4422The output will go down to zero Volts and zero Amps (well a few mV and mA), so is suitable for a lot of bench work.
Heh.. the gain/level shift is neat, though doing a whole four transistor diff amp / VAS / feedback seems rather overkill. Downside: because it's noninverting, the emitter ("tail") voltage will vary all over the place, which means R14 bias current varies all over the place. Probably if you add just one more transistor
it'll be better guaranteed. By which I mean, a current source (one transistor, or two like Q6-Q7... whichever you prefer).
If your V1 is guaranteed to be more than, I don't know, 10V or so, you could just as well delete R14 and run R18's bottom end there instead. Saves a milliampere, too.
Also begs the question, if you're going to go to the trouble of using a discrete diffamp, why not get rid of the IC altogether -- it's not doing anything for you anymore!
You can get IC level performance by a couple of tweaks: instead of R20, use a current mirror (between the diffamp collectors) to considerably boost the voltage gain, and reduce offset voltage. (You'll still be left with maybe +/-10mV offset for using unmatched transistors in the diff pair, but oh well. You can trim that out, or if it's going to be an adjustable power supply, who even cares?) The common mode input voltage won't include GND, so you won't be able to adjust output voltage or VREF all the way to 0V, though you could add a small -1V or something rail to allow that.
Tim
Overkill is good
I'll use a current source in place of R14, used a resistor to keep things as simple as possible for the simulator.
Not getting rid of the IC because of two reasons: 1. Offset voltage 2. Need for a negative supply (which I think is a pain in the ass - yeah I know it's not difficult stick a charge pump in there but I can't be bothered).
Hmm... current mirror... transistor matching... eww tedious. Not going for the dual NPN either, not jellybean enough. A LMV321 will outperform the discrete-only version in terms of offset voltage anyway, btw the V
REF is a DAC.
I'm trying to go for something less fiddly here - just slap it together with the least amount of tweaking.
About V1... that's actually going to be a tracking pre-regulator with an option to be disabled, I'll simulate that using a normal voltage source in series with a VCVS and probably do a multi-step analysis for different output voltages and currents.
You can also go for the darlington-esque input stage, e.g. LM339, 324, etc., which allows operation below GND.
You don't need matched transistors for a current mirror any more than you do for the diff pair. The first priority is gain, which any current type load will instantly boost from ~25 with the resistor to >2000. Mismatch in the mirror causes mismatch in the Vbe of the diff pair, which (if intentionally imbalanced -- the exact same way you use a single op-amp with trimpot to the supply) can be used to null the input error.
Or if you're still keen on using the op-amp for performance, why not go the whole way and use a proper (higher voltage, optionally R2R) op-amp directly? Dump about half the components count in one fell swoop!
Tim
Or if you're still keen on using the op-amp for performance, why not go the whole way and use a proper (higher voltage, optionally R2R) op-amp directly? Dump about half the components count in one fell swoop!
Tim
Well there's the problem... for this version the maximum input voltage is about 37V DC (24V AC rectified and filtered, no load), which makes finding a suitable opamp quite difficult, not to mention it's nearly impossible to find one if I want to go for a 30V or 40V output version so I'm sticking to this solution for flexibility and performance.
Yeah, I know I could trim the output voltage to null the offset as I'll have a 12-bit DAC and a 24-bit ADC at my disposal at some point down the road but why create an extra problem? I can get the MCP6021 for $1 in one-off quantities in a SOT-23-5 package and it will always outperform the discrete solution when it comes to offset - less hassle with trimming stuff. If I want it to be cheaper I could just use a LMV321 - it's almost for free.
So, you're going with a more complicated and expensive solution because it's simpler..? Excuse me if I don't follow
Tim
Which part are you referring to? DAC + ADC?
No, I mean the op-amp and discrete stuff... structurally speaking you have the worst of both worlds. Might as well wrap it up into a slightly more expensive op-amp, or get rid of the amp altogether and clean up the discrete to be competitive. No point in having both.
Tim