Bypass (Decoupling) Capacitor Dilemma

[seedpress]

I'm having trouble figuring out how to ground my bypass (decoupling) capacitors.

Normally a short via to the ground plane would be used. The problem is that my design does not have a ground plane. Instead, I'm using a star layout for my grounds (and VDD's); this layout is necessary because we are using a prototyping perfboard.
from: https://www.adafruit.com/product/1135
 

Star layout example (not mine) from:
http://ww1.microchip.com/downloads/en/DeviceDoc/DS00924A.pdf




The perfboard has traces and power buses. We can easily solder the bypass caps close to the VDD IC pins, but the grounding end of the caps is up for grabs, and that's the issue about which I'm seeking advice.

My inclination is to put the bypass caps right across each IC's two power pins. This, however, creates a long path from the bypass capacitor's ground to the power supply ground, which it would be sharing with currents from the IC's starred ground wire.

The only other option is to star the caps ground lead to the power bus as close to the star hub as possible. This seems really kludgey.
 
By the way, all my IC's are socketed and the other components are discrete. Also, I'm planning on connecting together all the unused traces and pads on the perfboard to create a sort of ground plane. But I don't think that will be big enough to solve my bypass caps problem.

[Ash]

Hi,

I assume this is a digital circuit (you didn't say much about the application). In which case the point of decoupling caps is to supply fast current pulses during switching of gates in the IC. Otherwise these pulses would have to work against the inductances to the supply and cause ground bounce and other such problems.

Putting the decoupling caps right between the IC pins is correct, otherwise you are adding inductance in to the circuit and it won't be as effective and could actually ring badly.

Hope that helps
Ash.

[forrestc]

I'm having trouble figuring out how to ground my bypass (decoupling) capacitors.

Normally a short via to the ground plane would be used. The problem is that my design does not have a ground plane. Instead, I'm using a star layout for my grounds (and VDD's); this layout is necessary because we are using a prototyping perfboard.

Can you provide a bit more information about your design?   Like what parts, what consumption, any low-noise requirements, etc?

If you are using a protoboard, chances are that a perfectly adequate thing for you to do is just wire vdd and gnd to the + and - rails on the side, and then near your components, solder a .1uF cap on one side or the other of the breadboard directly to the rails - Or maybe a bit better, nearer to the component.     For most parts, the placement of the bypass caps and routing of power rails are not nearly as important as one would think.   Only when you get into high speed design and/or precision analog do you they start to be extremely critical.   And generally, when you get to that point, trying to make one of these circuits on a breadboard rapidly becomes an exercise in frustration.

[seedpress]

Well, it is low-frequency digital, I guess. I'm using one, dual CMOS RC timer, the ICM7556, and two TLC5917 LED drivers. One half of the timer is running at about 500 KHz to supply a clock signal to the TLC5917's. The other timer is running at about 400 Hz, and has a variable pulse width to PWM the LED's. The TLC5917 has an embedded microcontroller, so it is part analog and part digital, for which the clock is needed.

At the moment the circuit is breadboarded on a solderless breadboard. Needless to say, the clock signal is migrating all over the circuit, though it isn't causing any malfunctions. I'd just like to minimize the artifacts--as much as possible--when things get soldered together.

The three IC's won't use a lot of power, but the LED's will max out around 20 watts or so.

[KL27x]

+1 Ash. Inductance to and from the supply can cause temporal rail differential between IC and other components. But digital logic output levels are more stringent than input levels, so there's some built-in leeway. Hence, ground bounce will not necessarily cause a problem. The other reason you want the cap directly between the pins is so that the IC doesn't brownout or malfunction when there's a temporary local dip in the supply voltage caused by the IC, itself, when it is switching output pin states. Trying to connect the ground or power rail of the cap anywhere but the pins, themselves, is defeating this purpose.

If you have to get accurate analog signals to and from your IC's you might have to make more considerations than that. But you still want decoupling caps directly between the supply pins. If you want to compensate for poor ground connection with high inductance, you can use more decoupling caps in parallel. This increases the total capacitance without increasing the ESR. You might put higher value higher ESR in parallel with the usual 0.1uF, for instance. And you might want to sprinkle some extra caps throughout your board. As far as I know it's not necessarily a hard science for when and where. My first working proto often has way too many, because it's something I sometimes try adding when I don't know what is actually wrong.

[DBecker]

You want the decoupling capacitors close to the device pins to bypass the noise at the source.

Attaching one lead close to the device and the other lead to the center of the star ground is likely to increase the coupled and radiated noise. 

[Ian.M]

That's why in the days when DIL 74xx logic families were king you used to be able to buy IC sockets with a built-in capacitor directly between pin 1 and the diagonally opposite power pins.  (I believe they are still available at a ridiculous price premium.) 
IIRC you could also get a flat capacitor the same size as the socket with really thin flat pins at each corner.  Two were dummy pins for mechanical support only, and the other two connected the capacitor to the power pins.  The logic IC then fitted on top of the capacitor with its pins in the same socket holes.

The best decoupling you can affordably do on protoboard (without a ground plane) for a DIL package with power pins on opposite sides is an axial cap under the board directly across the power pins.  If they are on the same side its much easier - just put a disk ceramic or resin dipped leaded MLCC right next to the chip directly across the pins. 

However for pins on opposite sides, its usually good enough to run a good heavy ground bus as close to the chip as possible - ideally soldered on the copper side right under the chips all in a row, and put the decoupling caps at the end of each chip right next to its Vcc or Vdd supply pin.  Do a bit of searching and for a moderate premium, you will find protoboards laid out in this configuration with Vcc and Gnd tracks under each row of 0.3" wide DIL footprints.

Edit: See Glarsson's TTL pinout correction below. %me%:   

[glarsson]

That's why in the days when DIL 74xx logic families were king you used to be able to buy IC sockets with a built-in capacitor directly between pin 1 and the diagonally opposite power pin.

Not pin 1 for TTL. It is the other diagonal, i.e. 7+14, 8+16, ...
Also available was sockets with enough space "inside" so the capacitor could be mounted between the PCB and IC.

[forrestc]

Well, it is low-frequency digital, I guess. I'm using one, dual CMOS RC timer, the ICM7556, and two TLC5917 LED drivers. One half of the timer is running at about 500 KHz to supply a clock signal to the TLC5917's. The other timer is running at about 400 Hz, and has a variable pulse width to PWM the LED's. The TLC5917 has an embedded microcontroller, so it is part analog and part digital, for which the clock is needed.

At the moment the circuit is breadboarded on a solderless breadboard. Needless to say, the clock signal is migrating all over the circuit, though it isn't causing any malfunctions. I'd just like to minimize the artifacts--as much as possible--when things get soldered together.

The three IC's won't use a lot of power, but the LED's will max out around 20 watts or so.

So, I'd dispense with the star ground - with one caveat I'd mention below.

Hook the Vdd and Gnd to the busses, hook each power and ground pin directly to the bus.   On the TLC5916, it's going to be easy to put a decoupling cap right across pins 1 and 16.   Just take a .1uF Cap and put it on the breadboard off the end of each IC , and wire to GND and VDD pins - solder bridge will work fine, although I'd probably bend the leads over to pins 1 and 6.

The 7556 is a bit different.  One trick I might consider is flipping the breadboard over and putting the cap on the bottom from pins 7 to 14 directly.   Sort of surface mount-style.  A bit creative-looking, but heck, you're on a breadboard.

Back to your grounding.

I'm going to make a wild-ass guess that what you are seeing is actually voltage drop due to the ground currents from the LEDs, not digital switching noise.  Bypass caps usually fix the latter, not the former.   Look very carefully at the voltage path from the + terminal of the LED power supply to Leds, then to the TLC5916's and most importantly:  the ground path back to the - terminal of the power supply.   If this path is being shared with the digital "ground" path, then that's probably what you are seeing - the ground is bouncing due to the change in currents.   Especially if you are PWMing the LED's.   As the leds turn on and off, the current in the ground path will be changing.   It doesn't take a lot of current through a breadboard to create a bit of a voltage drop, which might show up like what you are describing.

[seedpress]

Thanks to all you folks for the great help. I guess I'll be bypassing between the power pins, as advised!

The LED driver is easy, ground and Vdd are close and opposite of each other, pin 1 to pin 16. The timer will be a diagonal from pin 7 to 14. All done under the sockets.

I'll also be decoupling the supply rails. Using a large electrolytic on that bus plus a 1uF MLCC X7R dielectric and a 100pf MLCC COG dielectric—just to cover all the bases. Using the same 1uF and 100pf paralleled on the IC power pins. Decided not to use tantalums when I remembered having some blow up a few times.

Now that you mention it, Ian.M, I remember those sockets with the built in bypass caps. Neat! Maybe that's why I had a hunch to put the cap between the pins. I just needed some feedback from others. My skills, such as they are, have gotten rusty.

Thanks again everyone!
P.S. As I was about to post this, Forrestc posted first. I'll have to study your comment and reply again.

[seedpress]

Forrestc,

The LED's have their own positive supply rail, which is 15 volts. The IC's are running on 5V. Of course all the ground currents are shared. The noise I'm seeing is riding on top of the pulse-width modulated LED “drive” signal and is at the clock frequency (not the PWM freq). It isn't harming anything (yet). It just bugs me!

The driver doesn't really drive the LEDS, it just acts as a current controlled gate. It's a little tricky to lower the power dissipation, but the chip will shut down if you don't do it right.

I'll be “driving” about 45 LED's with each chip. Right now, on the solderless breadboard, I'm just testing 9 LED's. When I move everything over to the perfboard then it will be the full 45 or so. I will then be paying closer attention to the layout of the ground return, using your cautions and tips as a guideline. Thanks.

[David Hess]

Everything you need to know is in Analog Devices application note 202.  Ideally you want to minimize the loop area but that is hardly going to be practical without a ground plane.

Running the decoupling capacitors back to a single point ground will be useless because of the long lead length unless the layout is small.  In practice what I have done in this case with the same construction technique is to decoupling each IC as needed and tie the grounds (or Vcc or both) lines together, sometimes as a grid, to minimize loop area between outputs and inputs.  It works surprisingly well.

And you cannot always just decoupling to ground and power planes when they are available.  Mixed signal circuits can fail do to digital decoupling to a shared analog and digital ground so instead ground "islands" are created and tied to a single point ground or a separate signal ground can be used.  Sometimes slots can be cut into a ground plane to divert digital ground currents away from analog nodes.