EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: m4rtinpf on July 02, 2021, 09:07:13 pm
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I've designed a PCB and was looking for some review and advice. The images are attached to this post.
The board is for an up/down frequency converter. Specifically, from 0-300 kHz to 400 MHz.
It's a simple design, the input signal gets multiplied by a 400 MHz square-wave (X1) by a mixer (U6 or U2). There are also two LPF and limiters.
Power comes from a USB connector or a terminal block and gets regulated down to 3.3 V by U5.
I'm planning to get it fabricated by JLCPCB, including the assembly of the SMT parts that they carry. I would have to hand-solder the ICs (or get someone to it). It's a two-layer board, and I need a single unit.
The size of the board is due to the enclosure I'm gonna use (Hammond 1455L801).
I have a few questions:
1. The ground plane is split in two places:
- The (amplified) clock signal (400 MHz square-wave) from U4 to C3, so VCC can get to the other side of this trace.
- The down-converted signal (<300 kHz) from U6 to L2, so this trace and the input signal (400 MHz) can cross.
Is this OK or using 0R resistors would be better?
2. Should I remove the solder paste from the ICs that I'm not getting soldered by JLCPCB?
3. Are the vias connecting the top-layer filled zones to the ground plane enough and well placed (besides the ones under the ICs, just followed the datasheets for those)?
Thanks for any help in advance!
PS: There is a minor misalignment between layers in the images. It's because of a bug in Kicad that makes it so silkscreen is under copper when plotting to PDF, so I had to manually stack the individual layers.
PS2: I'm using the LVDS variant of the oscillator.
PS3: Someone suggested that I switch to a 4 layer board (the electrical length for a 200 ps LVDS oscillator edge is ~29 mm and the longest trace between X1 and mixers is ~9 mm), and to add FR4 "walls" soldered as isolation between the areas of each box on the schematic. Are both of these things necessary?
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Remove the blue dotted lines.
They do not add anything useful to the schematic, and are possibly confusing.
A bit of whitespace does the job of separating different sections of the schematic just as well, and it is more pleasing to the eye because it does not add clutter.
Updating those dashed lines is also a nuisance during revisions of the schematic.
The texts which explain what the sections of the schematic do are useful though.
They usually are the first thing you want to see when a new person is analyzing the schematic. Making these bigger, and perhaps even bold makes them stand out more.
I'm not expericenced in HF analog design.
It looks like C13 & C14 are both decoupling caps. Put these as close as possible to U4. Now the wire between these caps and U4 is an unwanted inductor. You also want to connect the GND side of such caps directly to the GND plane. Not to a small island with just two via's.
Same for C13 & C14.
Unless I'm missing something in this design, and this is done on purpose.
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Hi: Very fine
Suggest:
Omit C1/8/14 probably unneeded.
4 layer bd is standard, no economy or reasons for use of 2 sided anymore.
Why the FET and Zener before the regulator? Many regs exist with built in capabilities for this app. Whats the max input V you expect?
Jon
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I'm not expericenced in HF analog design.
Neither am I!
It looks like C13 & C14 are both decoupling caps. Put these as close as possible to U4. Now the wire between these caps and U4 is an unwanted inductor. You also want to connect the GND side of such caps directly to the GND plane. Not to a small island with just two via's.
Same for C13 & C14.
Unless I'm missing something in this design, and this is done on purpose.
I was just copying the layout from the datasheet (see attached), but I see your point. It makes more sense to do it like you are suggesting.
Omit C1/8/14 probably unneeded.
Is there a reason to remove them? They are recommended on the datasheets.
4 layer bd is standard, no economy or reasons for use of 2 sided anymore.
I'll switch to a four-layer board then.
Why the FET and Zener before the regulator? Many regs exist with built in capabilities for this app. Whats the max input V you expect?
The diode is a TVS for ESD protection (reference 1 (https://blog.semtech.com/esd-protection-of-usb-2.0-interfaces) and reference 2 (https://www.digikey.com/en/articles/protecting-usb-from-power-surges)).
The FET is for reverse-polarity protection (reference (https://pdfserv.maximintegrated.com/en/an/AN636.pdf)).
As for max input voltage, I expect something around 5 V (let's say the max for USB 5.25 V). When selecting the regulator I focused on PSRR and having a package that could be hand-soldered (it's a TSOP-5).
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I ended up going for a four-layer design.
The stackup is:
- Layer 1 (F_Cu): Signal 1
- Layer 2 (In1_Cu): GND
- Layer 3 (In2_Cu): Power
- Layer 4 (B_Cu): Signal 2
I used the 7628 prepreg from JLC PCB (https://cart.jlcpcb.com/impedance).
Layers 2 and 3 are uninterrupted, layer 4 is all ground except for a single trace.
Note: JLC PCB only does through-hole vias.
Is it okay to only route one trace on layer 4 (I feel like I'm wasting it lol)?
I thought about the possibility of switching to stripline, but all signal traces would have to go to layer 2 through vias. And I don't know if it would even be useful.
Do I need to add RF shielding between the different parts of the circuit (like FR4 "walls" or proper cans)?
Thanks for all the help!
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Update:
Last week I was finally able to test the board and it works!
The board was done by JLCPCB, who also soldered the passives.
A local shop soldered the ICs (hence the melted U4 on the top left).
Just posted back to say thanks for all the help!