The Art of Electronics, figure 13.4

[Clear as mud]

Art of Electronics, third edition, figure 13.4 on page 883.

In the figure, some text says to tie the non inverting input to Vref/2 for positive Vout.  But of you think about it for a minute,  it's clear that won't actually work.  Depending on which bit switches are activated,  the current could flow either direction through the feedback resistor,  if you did that.  So I don't think the output would be what anyone expected.  I'm wondering if the authors were trying to think of something else.   Is there some other common configuration that could give a positive output using Vref/2 instead of -Vref?

Also,  the other little note "switch Ron compensation" makes no sense and I think the switch, note, and even the capacitor were accidentally copied from another figure.  I'll probably report all this on the book errata page.

[Kleinstein]

The inverted R2R DAC only makes sense with the current output tied to a virtual ground. So changing the voltage at the OPs non inverting input is not a good idea. This would change the voltage seen by the switches which is not a good thing.

The switch resistance compensation does make some sense, if there is also some compensation with the 10 K resistors in the DAC itself. Usually the resistor for the feedback of the current to voltage conversion is also part of the ADC chip to get good TC matching with the resistor array. This may include compensation for the switches. The switch compensation may get away with just some silicon resistance instead of real switches (would be tricky at the 10 K).

[Clear as mud]

This figure is intended to be the introductory explanation of how an R-2R ladder DAC works.

They go on to say that there is a slightly different configuration for most actual DAC chips, and show it in the next figure, 13.5.  In that one, the top of the resistor chain feeds into the non-inverting input, and the bit switches are between a reference voltage and ground.  Then there is an op-amp with a positive voltage gain.

But they never really explain about the compensation part of the circuit.  There is a little bit of explanation in chapter 4, or maybe it's all explained there and I just didn't read that part.  How can the circuit work if the switch is opened?  Is it opened just momentarily, and the capacitor holds the voltage while it is open?

[thm_w]

Rotated image attached.

[Clear as mud]

OK, I think I get it.  They're talking about the on-resistance of the switches, R_ON.  The extra switch remains always closed, and has the same properties as the other switches, so that its resistance is added to the feedback resistance, and compensates for the R_ON of the other switches.

[Clear as mud]

Followup (a little late, I forgot for a while):

I reported this as an error on the book website, and one of the authors replied to me and said they actually were intending for the figure to be more similar to Figure 64 of TI's DAC9881 datasheet.  The figure is at the bottom of page 26 of the datasheet.

In the datasheet figure, the non-inverting input of the op-amp actually is Vref/2.  However, the configuration of the R-2R ladder is also different, more similar to that of The Art of Electronics figure 13.5, which shows an op-amp configured with a voltage-summing junction, instead of the current-summing one shown in figure 13.4.  So it seems there is no easy fix for this figure, to allow the note to convey its original intent.

[Kleinstein]

The DAC9881 has a classical voltage mode R2R DAC, and a simple set of 16 equal resistors for the upper bits.

The inverted R2R chain as shown in the picture is common in DACs like AD7523 and many similar ones.
The main advantage is having the switches all at the same potential. It is just the level shift that does not work and the switch resistor compensation needs more than just the always on switch at the OP.  It would probably best to just leave out these 2 points.  For the switch resistance it would need a compensation resistor with the 10 K resistors in the chain too. One could add this as a text.

[T3sl4co1l]

I think one could read the directive to mean "tie [all ground symbols in this figure] to Vref/2"; which reduces the drop along the R2R chain by half, which is still something, and, I'd have to think about it but I think that would just give 0...Vref/2 range, which is indeed positive, if half the range advertised otherwise.

Not that I would expect this reading to be the obvious interpretation, and some clarification would still be deserved.

Else, if changing just the one... that still works, doesn't it?  The resistor divider doesn't care at all where you connect it, as long as it's to a voltage source.  And then it would get either Vref/2 (switch up) or GND (switch down), both fixed voltages.  Charge injection would stink, as the switches are going between Vref/2 and GND, and probably error would increase (due to analog switch Rds(on) varying with Vcm).  Which is easily fixed by moving the "dump" rail to Vref/2.

And for sure, if the divider were moved to Vref/2 (top, "dump") and GND (bottom), it would be strictly below V(+in) = Vref/2, so the output would be strictly above, i.e. Vref/2...Vref (or some ratio thereof).  Which is also positive, but not zero-inclusive, which kind of sucks.

Tim

[Kleinstein]

The obvious way to get a positive output is to use a negative reference voltage.

[Clear as mud]

The obvious way to get a positive output is to use a negative reference voltage.

Yes, I had considered that, as well as the other suggestion to change all three ground points to Vref/2, but they're not very satisfying answers, right?  Using a negative reference voltage, practically, would require the additional complication of generating that negative voltage, another op-amp to do that.

Initially I thought that changing all three grounds to Vref/2 would still give a negative output, but I see now it does go positive.  But it's kind of backwards, right?  Setting all the switches to put current through to the op-amp would give the smallest output, rather than the largest.

I simulated the circuit of figure 13.4 in LTSpice.  But, I'm not very familiar with LTSpice.  When I run it I only get output voltage in the low mV range.  What did I do wrong?  File attached.  I followed the instructions here for the SPDT switches.