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Capacitor leakage tester (concept design)
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taydin:
I was thinking about the conceptual design of a capacitor leakage tester and came up with a design like below:

The user will enter the test voltage (and possibly the capacitance in order to give a hint to the device about how long the test will take. But this isn't critical). For example, for a 63V electrolytic, the user might enter 55V (or even 63V).

I'll let the DUT charge up to the test voltage over a low noise, low tolerance shunt resistor. While charging, i'll monitor the current using a very high input inpedance, low noise inamp. If the current goes down and settles below a configurable limit (1 µA maybe) the capacitor will be considered leak free. Otherwise it will be considered leaking.

But here is one thing that I'm not sure. Let's say the user has set a too high test voltage, for example 80V. Given that the capacitor is being charged over a relatively high resistance shunt, the current will be limited quite a bit. But the capacitor will probably start conducting. So my question is, in a current limited scenario, will a voltage above capacitor limit kill the cap? Or will the cap conduct at the high voltage, and then recover after the voltage is removed?
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