Hi,
i want to add a auto-zero-feature to my selfbuilt DC-nanovolt-amplifier to cancel-out non-temperature-related-drift. Therefore i studied the 34420A-manual and the analog-front-end-schematics and concluded it would be best to use JFETs (since its the best solid-state-switch concerning offset voltage, see also Keithley 155 and Keithley 7168) as a half-bridge, which switches regularly between ground and measurement signal. This way offset drift can be compensated.
Anyway: JFETs produce charge injection spikes, which id like to reduce. In the 34420A-schematic capacitors C201/202 are used, which cancel out the Cgs and Cgd-caused voltage spikes: Page 165 Q201/202/203 are the half-bridge, a 8-Bit DAC U204 produces an adjustable voltage. After a lot of fiddling with the values i seem to got good results for the cancellation.
http://literature.cdn.keysight.com/litweb/pdf/34420-90010.pdfMaybe someone has advice or documents which allow me to get even better charge injection cancellation results?
Greetings,
Echo