ESP23 RMII Layout With DP83825I

[nbetham]

Hi All!

I'm trying to add ethernet to an ESP32 with a TI DP83825I PHY. Currently I'm trying to layout this design with a two layer board using the bottom as a ground plane and the top as signal and power. However I'm currently running into an issue where the MAC in the ESP and the PHY aren't communicating properly. The ESP is receiving some of the RX packets from the PHY just fine though some are corrupted (0 length frames). TX on the other hand doesn't work unless I probe the clock line from the MAC to PHY and even then packets rarely make it through from the MAC to the PHY. TI states the RMII lines should be 50 ohm characteristic impedance to minimize reflections and losses.

My main questions are: For these short runs between the MAC and the PHY is trace impedance significant? Most rules of thumb I've seen say trace lengths anywhere from 1/10 to 1/100 the wavelength have negligible transmission line effects. The traces in my design are < 4cm in length or 1/150th a wavelength of the 50MHz RMII signal. And are those rules applicable in this case?

For reference the attached pic is a snippet of my design showing the RMII interface between the ESP and the PHY. Note, the 0805s in the signal lines are just bridged at the moment, I wanted to play around with adding some extra series termination. But I've also tried a design without the extra series termination and still had the same issues. Any help or pointers would be much appreciated!

Thanks

[bson]

Almost certainly a clock issue.

Do you have a low-capacitance active probe?  They're invaluable in situations like this.

If it works when loading the clock with a ~10pF passive probe, then this says your source impedance doesn't match the load.  Are the pins internally terminated in the PHY?  Most likely the problem is overshoot and bounce due to insufficient source impedance; when you add a 10pF load the rise time is reduced and you get less overshoot, and this is enough to make it work.  Are you sure it's 50Ω and not 100Ω?  50Ω seems low.

Not familiar with the ESP32 MAC, but it's also possible it's a problem with data signalling, and the MAC is suppressing frames with CRC errors.