filtering on ground?

[Clear as mud]

(? how do you get the pictures to show up in the message - I chose "inline expandable thumbnail, but it still puts them at the end?)

Here is an LT7101-based synchronous switching buck regulator, output 5V at 1A, input will be 36 to 59 volts.

Normally we would want a pretty solid ground, right?  I'm not sure the best way to attach PGND to GND. Initially I considered a filter bead like the one I show on the 5V output, I believe it's 100 ohm at 100 kHz.  The schematic shows a 0-ohm resistor, which could be a SMD, but I also considered creating a custom footprint that would have a solid copper area on another layer under the whole regulator circuit, connecting to a PGND pad on the input side and a GND pad on the output side.

But, a comment on my first thread led me to consider something completely different: why not filter the ground side symmetrically with the + voltage side?  I now believe the comment was geared specifically towards analog inputs, not the switching regulator circuit, but if the output is intended to operate on DC, and inductors and filter beads have very low impedance at DC, why not use them to filter out the high-frequency components from the ground side of the circuit as well as the non-ground side?  So, I made this alternative schematic.

The incoming ground is PGND, then PGNDa, then LT_PGND and LT_SGND, then the outgoing ground is just GND.  With inductors and filter beads between grounds to match the ones on the positive side.  I guess, normally you wouldn't want to do this because if the ground went off-board at all, then someone would probably connect incoming and outgoing grounds externally, so the filtering would be for nothing.  And, I do have some off-board LED strips that will be powered from the 5 volts.  So: good idea? bad idea?  I might simulate both in LTSpice and see what they look like.

[T3sl4co1l]

For a regulator, I wouldn't worry about it.  I wonder how I'd even construct a setup to measure it.  What would be the expected effects?  Glitchy timing?  Noisy or drifty output (e.g. noise demodulated into control loop)?

With a ferrite bead in there (probably the second example is better), you can at least inject noise to see what happens.

As a policy, I only split grounds when cause can be shown that it is necessary.  It is very rare that this occurs in an initial design stage, and I haven't yet had a project where poor grounding has been implicated.  (Mind, I haven't done many low noise projects, so don't give too much weight to this opinion with respect to those cases.  The plural of "anecdote" is not "data"!)

Tim

[Daixiwen]

I usually don't bother either. Just connect the SGND pins directly to the ground plane, and connect together the high power ground pads (PGND, capacitors) with a thick trace, connected to the ground plane in one point, away from high currents.
I have never made the experience either, but I wonder if high frequency potential difference between SGND and PGND will cause higher noise, rather than lower one. I've never seen any dc/dc converter datasheet recommending to filter some ground pins.

[Clear as mud]

Sounds like a lot of experimentation would need to be done and actual data gathered, before one could say how filtering the ground might change anything.

I'm OK with skipping all of that and just using a solid ground as recommended.   

[KT88]

Splitting PGND and SGND on the PCB is usually a terrible idea. The purpose of having different ground pins is to avoid current sharing of noisy and sensitive internal nodes through one bond connection (it's not alway just a wire anymore). This is simelar to ADCs by the way...  However it makes sense to treat PGND and SGND differently on the PCB. This means having a parition of the one and only GND on the PCB for PGND and one for SGND. You can find an example in the EVAL-Board layout of the LT7101. The grounds are directly connected but the sensitive signal connections like VFB are separated from the rest of the ground plane. This allows to avoid injecting noise into the fragile parts of the circuit.
It is also a common misunderstanding that a groundplane is able to somehow delete noise that is fed into it... The best results are achieved if no noise is dumped into the ground plane. This can be achieved by taking care of smallest loop areas and proper return paths for transient currents. The most important part is the connection of the input cap for a buck (it would be the output cap for a boost). There is also some significant noise conducted over the winding capacitance of the inductor that has to be taken care of...
If that is done correctly there is not much noise that escapes the regulator circuit....
p.s. The inductor has to be connected with the inner part of the winding to switch node and the outer part will act as a shield connected to the output cap (thus the need for a proper output cap placement and routing...).

Cheers

Andreas

[Clear as mud]

Keep in mind I actually have five ground nets in my second schematic, so theoretically, could keep the ones labeled LT_PGND and LT_SGND together as you suggest, while still splitting the others with three inductors and/or filter beads.

But I'm not going to do that.  I'm going to keep the first schematic, and use traces to steer ground current from sensitive pins to some star ground point, as a couple of people suggested.

Thank you for pointing out the difference between external and internal windings on the output switch inductor.  I will look into that.  It's a Würth 74404063100.  I thought it seemed a bit large, but just looked again and I guess it is similar in size to the one on the manufacturer demonstration circuit.  I was advised to look for one with a high self-resonant frequency, which would equate to low stray capacitance.  Once I filtered by 10uH inductance and at least 200 mA saturation current, I sorted the results by highest resonant frequency, and the top ones were all pretty large in size, so I scrolled down to find a little bit smaller one, and that is it.  I guess the external winding is the side with the dot?

One more question: The EXT_Vcc pin supplies an internal LDO regulator that is in parallel with another internal LDO powered from Vin.  So after the circuit starts, it can run off the 5V output instead of the 36 and up volt input.  Would it be better to connect EXT_Vcc to the filtered output (net labeled +5V) instead of the un-filtered one (net labeled VOUT)?

[Clear as mud]

I was just looking at the functional diagram again (page 11 of the data sheet), and I think if I'm going to take EXTVcc from after the filter then I might as well take Vfb from there as well.  I had thought that the feedback pin was part of the high-frequency loop, and the low-side internal mostfet went from Vfb to SW, but I was wrong.

[T3sl4co1l]

Show your layout if you like, we can discuss it.

Tim

[KT88]

If the output cap is done correctly you won't need to connect EXTVcc and Vfb behind the filter. The probably longer leads might even pick up more crap through the magnetic field of the inductor than you would get by having it connected directly to the output cap.... With Vfb you might even run into stability issues.
The inductor you have chosen would be ok if cost woud be your major concern and not noise. The reason is that this specific inductor uses a drum core which floods the adjacent parts of the circuit with it's transient magnetic field. Better woul be a so called magnetically shielded inductor - Würth has them as well. The cost adder is not that much...

Cheers

Andreas

[Clear as mud]

I already thought about the stability issue and decided not to connect the Vfb pin after the filter.

I did not realize I had selected a non-shielded inductor.  I was going for all shielded ones.  I used the filters on Digikey, and sometimes things can be incorrectly categorized.  I guess I need to look for the word "shielded" on the datasheet.

[Clear as mud]

I started laying it out the other day.  I think I'm going to use a four-layer board.  I didn't do any fill zones yet except for  a small Vin on on the top layer.  In the area right around the regulator, the top and bottom layers will be PGND, the upper internal layer will be GND, and the lower internal layer will be Vin on the input side and Vout on the output side.  I didn't run any GND traces yet, but I think they're going to connect with PGND right at the big PGND via under the input capacitor.

[Clear as mud]

I found an inductor that is actually shielded.  Looks shielded, and says so on the data sheet: Würth 784770100.  $2.64 instead of $1.12 in single quantity.  I will plan on using this one for the output inductor.

[winniethepooh_icu]

Splitting PGND and SGND on the PCB is usually a terrible idea. The purpose of having different ground pins is to avoid current sharing of noisy and sensitive internal nodes through one bond connection (it's not alway just a wire anymore). This is simelar to ADCs by the way...  However it makes sense to treat PGND and SGND differently on the PCB. This means having a parition of the one and only GND on the PCB for PGND and one for SGND. You can find an example in the EVAL-Board layout of the LT7101. The grounds are directly connected but the sensitive signal connections like VFB are separated from the rest of the ground plane. This allows to avoid injecting noise into the fragile parts of the circuit.
It is also a common misunderstanding that a groundplane is able to somehow delete noise that is fed into it... The best results are achieved if no noise is dumped into the ground plane. This can be achieved by taking care of smallest loop areas and proper return paths for transient currents. The most important part is the connection of the input cap for a buck (it would be the output cap for a boost). There is also some significant noise conducted over the winding capacitance of the inductor that has to be taken care of...
If that is done correctly there is not much noise that escapes the regulator circuit....
p.s. The inductor has to be connected with the inner part of the winding to switch node and the outer part will act as a shield connected to the output cap (thus the need for a proper output cap placement and routing...).

Cheers

Andreas

+1 to not splitting them.

IMO the actual reason splitting could ever be necessary is because of architectural issues in the IC.   You will encounter some bucks which have internal PSRR issues, noise on the LDO can corrupt internal functionality, you will even find some that strongly depend on the high frequency cap between input and GND being very close to the IC, if not then the high side current sense goes to hell in a handbasket.

As long as the cap on INTVCC is well placed with a tight loop and low impedance to the IC this should be fine.

LT provides reference layouts and if they have EMI data provided with that layout, it is a good hint that the layout is probably good to go.

[KT88]

There are two reasons why you don't want to split grounds ever:
1st: You get capacitive coupling of noise from the power section into the control circuit including the feefback amp. This might then look like a PSRR issue (it doesn't mean that there are no poorly designed parts out in the wild that genuinely suffer from poor PSRR performance though...).
2nd: if the IC is monolithic, any voltage larger than 0.3V between the ground domains on th die would cause a current through the shottky diodes violating the absolute maximum ratings for negative voltage referred to grond (although it is not always explicitly stated for differend grond pins like in the LT7101 DS).
This causes two problems: 1st it injects sinificant noise (again) into the control circuit, letting it perform below spec. The 2nd is even more problematic:  this is called electro migration. It comes from overheating of metal traces where the material is physically spreding from it's original location causing potentially both open- and/or short circuits. Depending on the severity of the problem, it can go fast or take even years until the part fails.

The inductor looks good now. Btw. Würth provides models of their inductors for LTSpice. I also would recomment to use more detailed models of the important capacitors. AVX has a pretty comprehensive section on their website called SpiCAT: https://spicat.avx.com . They describe some capacitors as three series tank circuits in parallel. Using these models show even the spikes you get on the real PCB which you won't see in a basic simulation. Doing that it also makes sense to estimate the PCB-trace inductance and add it to the simulation. You could easily run these parasitics as a parameter in LTSpice to get an idea how they influence the noise...you may be surprised that even some pico Henrys can ruin your day...
When you have run the simulation it is a good idea to check the peak current of the inductor and compare it against the data sheet. Important is to consider high teperature saturation current and tolerances. That done make sure you don't come to close to that limits. Saturating inductors are another source of severe trouble...

Cheers

Andreas

[Clear as mud]

The layout is mostly done now!  I made a new post in which I included the entire board and not just the 5V switching supply.

If you want to focus on the switching regulator, the last 5 pictures deal with that.  My only specific question, at this point, about the switching regulator is whether I should leave out the GND zone on the layer immediately below the top layer, and just leave it with the two traces surrounded by a PGND zone instead of the GND zone.  I already have PGND zone on the very bottom layer, and on other areas of the first internal layer.