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Circuit review: Fast DAC driver / pulse generator for 50 ohm loads

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Joakim:
Hi fellow electronics enthusiasts!

I am a student working in an optics lab where much of my time is spent developing FPGA systems for data acquisition, experiment control and data processing. Now, I have been tasked with developing an interface board that is able to drive 50Ω loads with either pulses or a waveform, (sine/triangle etc) and all I can say is; analog electronics is difficult! :)

This is my first time designing, in an organized manner, something that is a) high-speed and b) using multiple IC's, so I would really appreciate any advice both on component selection and circuit topology before I start laying out the board.

I have simulated the circuit (apart from the LDO regulators and the analog switch, for which I was unable to find working SPICE models), and it indeed behaves as I would like, but I have a feeling that there are many traps that I surely must have fallen into.

The problem (In order for me not to fall into the XY-trap):
I would like to send narrow (~10 ns) pulses to an electro-optical modulator (EOM, https://www.thorlabs.com/newgrouppage9.cfm?objectgroup_id=3918) which is 50Ω terminated. In addition, I would also like to set the amplitude of said pulses, or drive a non-pulsed signal (does not need to be very fast) into the modulator.

Using a benchtop function generator is easy enough, but I would like to control the signal send to the EOM using my FPGA (Zynq-7020). For my use case, I would like to drive voltages between 0 to ~6V, and naturally the FPGA's GPIO pins cannot source the current necessary for that.

Let me illustrate two use cases I have in mind:

UC1: I want to output a waveform to the modulator using the FPGA in the range 0-6.6V
UC2: I want to output narrow pulses with a digitally-settable amplitude to the modulator

The general idea:

* Use a DAC to set the amplitude (0-3.3V output) or drive waveform from the FPGA
* (Optionally, "chop" the DAC signal into pulses if I want to feed a pulsed signal)
* Amplify and buffer the 0-3.3V signal to the full range (0-6.6V)
Schematic:

(Schematics are attached below the post)

Below are the design choices that I made when choosing the components and designing the blocks in the schematic, as well as some comments on the process.

"DAC":
Here I have opted to use a simpler DAC, which I already am familiar with from the Digilent Pmod DA2, and I figured that, since the digital switch will do the high-speed switching, the DAC itself doesn't need to be fast. The DAC is powered using the 3V3 rail from the FPGA, and the FPGA ground is connected to the GND net on the board.

"Pulse generator ('Chopper')":
Fastest SPDT switch I could find. When the PULSE pin is high, it will output the voltage at pin B1, and be grounded (output 0V) when the pin PULSE is low. My understanding is that it works almost like a mechanical switch, where the signal is directly fed through when the switch is closed. If this assumption is true, then I would be able to drive a waveform from the DAC straight through the chopper by leaving the PULSE pin high, but also generate pulses by outputting a voltage using the DAC and rapidly toggling the PULSE pin. The motivation for using an analog switch in lieu of something transistor based is that I was unable to design a transistor circuit to switch the signal adequately. :-)

"Gain + 50 ohm driver":
Fast op-amp that is capable of supplying high currents, but a drawback is that it is not rail-to-rail, hence the peculiar VCC/VEE using two LDO regulators. The voltage swing is around 1.2-1.3 volts from the supply rails. The absolute maximum supply voltage is 12.6 V. The feedback resistor is a trimpot in order to be able to adjust the gain, but at 50% setting it should give a gain of G=2. I've placed a 2pF capacitor to ground as suggested in the datasheet. It seems really difficult to find an amplifier that has both i) high bandwidth, ii) high input voltage range, iii) rail-to-rail, iv) can drive 50Ω. Capacitor choices on the power rails are heavily

"+8V Supply" & "+2V Supply:
Linear regulators because I want to limit noise that could be amplified by the op-amp. I am very unsure about generating the power rails for the op-amp this way. It just does seem like the right way to do this, but I need a negative supply voltage to the op-amp. 10uF capacitors to ground, but I am really unsure about the values here.

Power supply:
I intend to power the voltage regulators with a 12 volt wall plug.

Connectors:
12 pin straight header that plugs into a Pmod header on the board used to control the DAC and trigger the pulse. Barrel jack for the power supply. SMA connector to connect to the equipment using a standard 50 ohm coaxial cable.

Component datasheets:
Operation amplifier (AD8009): https://www.analog.com/media/en/technical-documentation/data-sheets/ad8009.pdf
Analog switch (PI5A3157): https://www.diodes.com/assets/Datasheets/PI5A3157.pdf
8V regulator (BD80GA5WEFJ): https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/linear_regulator/bdxxga5wefj-e.pdf
2V regulator (BU20TD3WG): https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/linear_regulator/buxxtd3wg-e.pdf

Questions:

* Is this a sensible approach to solving the general problem? I have a funny feeling that there might be better ways.
* Are the decoupling capacitors properly sized? C3 is an electrolytic capacitor in the datasheet, does this matter?
* Is there a better way of solving the power supply for the op-amp?
Conclusion:
I have waded through a bunch of different components like line drivers, MOSFET circuits, BJT circuits and also tried altering the order of the blocks, and finally landed in this design here. I don't really know how to proceed anymore, and I would appreciate any pointers in the right direction.

Sincerely,
A graduate student who is lost in the analog forest  :)

Weston:
In theory your method should work. Rise time is going to be limited by the DAC output current / resistance of the digital switch and the capacitance of the digital switch and amplifier. If you are just using the DAC at ~ DC you might want to add a capacitor to the output of the DAC (datasheet says 1nF should be ok) so it has a lower impedance at high frequencies.

A current mode opamp is a good choice of a driver for applications like this. If you have the voltage to spare you might want to have the output in series with 50 ohms so the output impedance is 50 ohms. This will dampen any reflections due to mismatch with the load.

Some peculiarities with the schematic though:

The + and - inputs of the amplifier are shorted together.

Opamps can become unstable and oscillate at gains less than one. You might want to add a resistor in series with the pot so the minimum gain is 1. 

You are shorting the +8 and +2 volt rail to each other and to ground. Are you trying to create a split supply? Neither the input voltage range nor the output voltage range of the opamp does goes to 0V, so if you want a true 0V output you will need some sort of level shifting. Effectively you are going to need to supply the VSS rail with a negative voltage relative to ground of the output connector. The negative voltage you need will be dependent on the common mode input voltage and output voltage range given in the datasheet.

Easiest way to do this would be dual external power supplies. Can you do that? As this is a research project its probably the most time/cost efficient way to do it.

Joakim:
Thank you Weston for having a look - much appreciated!

I will use the DAC for both setting the pulse amplitude and for driving a sine wave, and whenever I'm not outputting DC, the frequency is most likely going to be in the tens of kHz to maybe a 100-200 kHz. I'll add a cap. Thanks for the pointers on the internal capacitances/resistances. I have a hunch that my PCB layout will be the dominating source of parasitics, thus being the de-facto limiter of the rise time.

I believe I would have to increase the gain of the op-amp by a factor of 2 to compensate for the added 50 ohm series resistor here, so that the maximum voltage out would be ~12V. Given the negative supply that seems to be needed, I do not have that range here unfortunately while still complying with the absolute maximum supply voltage. Also, I am not sure how much of bandwidth I would sacrifice by increasing the gain here.

Regarding the power supply: I figured that I needed to have a negative voltage range in order to bring the output to 0V for an input of 0V, as the input to the amplifier can be between 0-3.3V regardless of whether I am generating pulses or just passing through the switch. Since the op-amp only goes to 1.3V above the negative rail, I thought I had to have a negative rail that is actually less than -1.3V. In the simulations I did something similar to what I drew in Altium, where I got it to work by connecting two voltage sources in series with a ground in the middle of them (I have attached a screenshot + the .asc file below). I am not very familiar with SPICE at all, but I suspect this could have something to do with me using ideal sources.

My initial idea was to use two lab power supplies to generate the positive and negative rail, but I wanted a more compact/integrated solution as these kinds of boards tend to long outlive the students' stay at the institution and become lab standard equipment. However, if using benchtop power supplies would greatly simplify handling of the power rails then so be it. I am leaning toward doing that.

Alternatively, would it be possible to amplify the input signal to close to the full range of the AD8009 and then add a negative bias to the output in order to compensate for the 1.3V offset? But again would I not run in to the problem of needing to find a high-speed, high-current rail-to-rail op-amp in order to do that? Or at least one with a higher output voltage.

Oh dang, thanks for noticing the short between Vin+ and Vin-! Resistor will be added to the pot, thanks.

Another question: The 10 uF between either of the power rails of the op-amp are electrolytic caps in the datasheet, but I picked ceramic ones. Would this make a difference in this application?

Again, thank you very much for taking the time to help!

moffy:
Just a small note, it can be safer to place a fixed resistor in parallel with the pot, so that if the pot wiper should break, go open circuit, for any reason then the gain is limited to a maximum value by the resistor in parallel with the pot. Wipers on pots can break contact due to wear, environment, vibration, poor quality etc. so a simple precaution can help.

Weston:
If you want to have the DAC output a sine wave a capacitor might load it down too much. The datasheet for the DAC is a bit sparse on information about the DAC output. I would put an empty pad on the PCB for a cap at the very least.

If you want to supply a single power supply input what you want is commonly called a "virtual ground", if you look online there are lots of schematics. Its a bit tricky as most voltage regulators can only source current and a virtual ground has to sink or source currents to maintain its output. At low powers you see a common way to create a virtual ground is to use an opamp output, but most opamps can not source high currents and can not drive large capacitive loads. 

Is your load actually 50 ohms or is it purely capacitive? If its purely capacitive you could level shift the DAC output and then level shift the output connector.

Ceramic capacitors over electrolytic will be fine. Ceramic capacitors have lower ESR so will typically be better. One think I like to do on PCBs with an external power supply is to add an additional large electrolytic capacitor on the input. The smaller capacitors referenced in the datasheets are often not enough when dealing with cable inductance. Additionally, when the power adapter is plugged in there can be a voltage spike of up to 2x the supply voltage due to ringing with the cable inductance. The ESR of a larger electrolytic capacitor will dampen this resonance and prevent voltage spikes.

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