Electronics > Projects, Designs, and Technical Stuff
CMOS Crystal Oscillator duty cycle
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Ian.M:

--- Quote from: fabiodl on November 05, 2018, 09:32:03 am ---Thank you, I see, you first let the duty cycle be asymmetrical, and fix it later!

--- End quote ---
Yes, but that only works well if you use an UNBUFFERED CMOS gate (or discrete transistor etc.) for the oscillator, otherwise, with the much higher gain of a buffered gate,  its output is likely to be too 'square' to have enough adjustment range.  Also it should have symmetrical input logic thresholds to keep the oscillator section as undistorted as possible, so don't use 74HCT etc. You may also need to attenuate the oscillator output by reducing the coupling cap, or tapping down on the output with a potential divider, otherwise foward conduction of the buffer gate's input protection diodes will tend to force the bias point to half way between peaks, which may not be close enough to the 50% duty cycle symmetry point.

All in its a total PITA, so I strongly recommend Circlotron's suggestion of starting from twice the desired frequency and dividing that by two using a flipflop, which is in fact the standard way to get an inherently accurate 50% duty cycle clock signal, that's reasonably stable with respect to temperature and supply variations.
schmitt trigger:
What I am going to describe is an overkill, I know, I know.... But I am still going to suggest it for completeness sake.

If you cannot find a crystal with twice the required frequency, you can feed its output to a 74HC4046 PLL. Its output is a 50% duty cycle. Configured as a straight 1:1 ratio.
Please note, the "standard" CD4046 cannot run that high a frequency.
iMo:
Another trick worth trying: take the 30/70 signal, pass it via an LC tuned to the 10.73 frequency and feed it then back to a 74HC04 biased gate - that may create 50/50 too..
Benta:

--- Quote from: schmitt trigger on November 05, 2018, 05:39:31 pm ---What I am going to describe is an overkill, I know, I know.... But I am still going to suggest it for completeness sake.

If you cannot find a crystal with twice the required frequency, you can feed its output to a 74HC4046 PLL. Its output is a 50% duty cycle. Configured as a straight 1:1 ratio.
Please note, the "standard" CD4046 cannot run that high a frequency.

--- End quote ---

Neither can the 74HC4046. Don't even think about it.
David Hess:
Another way when you cannot modify the source is to RC couple it into a comparator and then use feedback from a rail-to-rail output to set the average voltage of the output to 50% of the supply voltage by controlling the comparator's trip point.  The comparator can be replaced with a gate as shown.  This is not quite as good as dividing by 2 but it can get within 1% without any adjustments.

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