CPU board Backplane design

[davorin]

Following idea:

Design a 19" 1 or 2HU rack where several linecards with onboard ARM CPU can be inserted.
As the ARM i.MX6 CPU features onchip Ethernet and PCIe lane, the design goal is to use the PCIe for adding a real GBit ethernet interface and use the onchip ethernet port for connecting to the backplane to be able to talk to other boards and the master board.

I've seen also Pericom does some PCIe briding chips, but I am not sure as PCIe would be useful in this case as a backplane instead of ethernet.

Anybody did some similar designs where several CPU boards need to communicate with each other?

[TiN]

PCIe channel is way more demanding for design implementation, and it's also point-to-point interface.

Meaning that your CPU is acting like a host, to which you connect target devices. I'm not familiar with i.MX series, but be sure to check if you can connect two ARM's together via their PCIe link, as that may require adding a bridge between.

So Ethernet is for sure more versatile solution, and you can also use it to interface slower devices (which cannot cope with PCIe interface directly).

[davorin]

I think I will go anyway for ethernet bridging with a low-cost ethernet switch at the master card...

That way not only I don't have to bother with PCIe bridging Linux drivers and applications,
but also termination is much easier when a card is not plugged in...

BTW: Has anyone seen 19" rack cases where line cards are fitted in horizontally?

All models I've seen, like for example Schroff, are vertical mount only....

[nctnico]

The cards are always mounted vertically for a good reason: natural convection!

[davorin]

Ah yes....like Cisco is doing it *lol

[Laertes]

Another great advantage of using gigabit ethernet: If you want to test something on a logic level, just pull out a card, plug in a little adapter board and connect to a host computer - too easy. You could even build a little test port onto the backplane. Wanna inject a few commands? Write a tiny little python script. That could be a real pain in the ass with PCIe...

If you do go for ethernet, take special care to design the backplane with EMI in mind. Lots of ethernet traces can be really nasty EMI sources.