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| Codec (PCM3168) input impedance issue! |
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| MT:
Im fiddling with PCM3168 codec and pondering about input impedance as i try to reduce the over all component count, lots of input and output differential buffers. I wonder about the bolded text, page 54 and 55. http://www.ti.com/product/PCM3168A How does the input structure look in this sort of ADC's? id like to replace the low gain Fig 60 input buffer stage with a higher gain current summing stage in which i can fiddle with the settings but at least R7-C3 -3db at 31khz, who both feeds the ADC and a separate low impedance,does R7 C3 muck up the input impedance requirements and the differential balance with low C3 values of the ADC or? Can the Vin- be either to VcomAD reference or C3 to GND as im trying to avoid ofseting suming amp IC1? Maybe either or are OK? --- Quote ---12.1.3 VIN1±, VIN2±, VIN3±, VIN4±, VIN5±, and VIN6± Pins In case of direct interface to VINx±, 1-μF electrolytic capacitors are recommended because the ac-coupling capacitor (which gives a 2-Hz HPF corner frequency and 47-Ω and 0.1-μF to 470-Ω and 0.001-μF differential LPF) is recommended as the anti-aliasing filter that gives a 160-kHz LPF corner frequency. If signal source impedance is not enough (too low) or input line length to the VINx± is not enough (too short), insertion of an analog front-end buffer (see Figure 58 to Figure 60) is recommended to maximize the dynamic performance. The voltage coefficient of the capacitor for an anti-aliasing filter should be considered to maximize the THD performance. A film-type capacitor is recommended; if a ceramic capacitor is used, a relatively higher voltage type is recommended. --- End quote --- |
| MasterT:
The problem with ADC is SD switching capacitor architecture. Data sheet for CS5510 has some pictures. Input impedance is affected by sampling rate, and may vary from 45k . What is more important, it's not linear, they put limits : 47-Ω and 0.1-μF to 470-Ω and 0.001-μF, and 470 OHm series resistor is the maximum. No way 5.6k, if respect THD level. |
| MT:
--- Quote from: MasterT on January 06, 2020, 11:25:47 pm ---The problem with ADC is SD switching capacitor architecture. Data sheet for CS5510 has some pictures. Input impedance is affected by sampling rate, and may vary from 45k . What is more important, it's not linear, they put limits : 47-Ω and 0.1-μF to 470-Ω and 0.001-μF, and 470 OHm series resistor is the maximum. No way 5.6k, if respect THD level. --- End quote --- Thanks for info, yes i suspected it was something like that im still puzzled by the, to low, to short note suggesting impedance to low but not upwards noting dynamic performance rather then THD. CS5510 datasheet refers to, Application Note 30, Switched-capacitor A/D Input Structures, unfortunately i cant find that one and Cirrus own links is dead ends. |
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